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Init with src project and tools suite

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Pratyush Desai 2021-09-29 16:43:29 +05:30
commit 77576ba626
Signed by: pratyush
GPG Key ID: DBA5BB7505946FAD
403 changed files with 84436 additions and 0 deletions
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6
nand2tetris-suite/projects/00/file.txt Normal file
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The only purpose of this file is to practice submitting files
in the Nand to Tetris course websites in Coursera.
There is no need to modify the contents of this file.
All you have to do is submit it as is, following the
Project 0 guidelines in the website.

5
nand2tetris-suite/projects/01/And.cmp Normal file
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| a | b | out |
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |

18
nand2tetris-suite/projects/01/And.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/And.hdl
/**
* And gate:
* out = 1 if (a == 1 and b == 1)
* 0 otherwise
*/
CHIP And {
IN a, b;
OUT out;
PARTS:
// Put your code here:
}

29
nand2tetris-suite/projects/01/And.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/And.tst
load And.hdl,
output-file And.out,
compare-to And.cmp,
output-list a%B3.1.3 b%B3.1.3 out%B3.1.3;
set a 0,
set b 0,
eval,
output;
set a 0,
set b 1,
eval,
output;
set a 1,
set b 0,
eval,
output;
set a 1,
set b 1,
eval,
output;

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nand2tetris-suite/projects/01/And16.cmp Normal file
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| a | b | out |
| 0000000000000000 | 0000000000000000 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 0000000000000000 |
| 1111111111111111 | 1111111111111111 | 1111111111111111 |
| 1010101010101010 | 0101010101010101 | 0000000000000000 |
| 0011110011000011 | 0000111111110000 | 0000110011000000 |
| 0001001000110100 | 1001100001110110 | 0001000000110100 |

17
nand2tetris-suite/projects/01/And16.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/And16.hdl
/**
* 16-bit bitwise And:
* for i = 0..15: out[i] = (a[i] and b[i])
*/
CHIP And16 {
IN a[16], b[16];
OUT out[16];
PARTS:
// Put your code here:
}

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nand2tetris-suite/projects/01/And16.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/And16.tst
load And16.hdl,
output-file And16.out,
compare-to And16.cmp,
output-list a%B1.16.1 b%B1.16.1 out%B1.16.1;
set a %B0000000000000000,
set b %B0000000000000000,
eval,
output;
set a %B0000000000000000,
set b %B1111111111111111,
eval,
output;
set a %B1111111111111111,
set b %B1111111111111111,
eval,
output;
set a %B1010101010101010,
set b %B0101010101010101,
eval,
output;
set a %B0011110011000011,
set b %B0000111111110000,
eval,
output;
set a %B0001001000110100,
set b %B1001100001110110,
eval,
output;

5
nand2tetris-suite/projects/01/DMux.cmp Normal file
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| in | sel | a | b |
| 0 | 0 | 0 | 0 |
| 0 | 1 | 0 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |

18
nand2tetris-suite/projects/01/DMux.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/DMux.hdl
/**
* Demultiplexor:
* {a, b} = {in, 0} if sel == 0
* {0, in} if sel == 1
*/
CHIP DMux {
IN in, sel;
OUT a, b;
PARTS:
// Put your code here:
}

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nand2tetris-suite/projects/01/DMux.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/DMux.tst
load DMux.hdl,
output-file DMux.out,
compare-to DMux.cmp,
output-list in%B3.1.3 sel%B3.1.3 a%B3.1.3 b%B3.1.3;
set in 0,
set sel 0,
eval,
output;
set sel 1,
eval,
output;
set in 1,
set sel 0,
eval,
output;
set sel 1,
eval,
output;

9
nand2tetris-suite/projects/01/DMux4Way.cmp Normal file
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| in | sel | a | b | c | d |
| 0 | 00 | 0 | 0 | 0 | 0 |
| 0 | 01 | 0 | 0 | 0 | 0 |
| 0 | 10 | 0 | 0 | 0 | 0 |
| 0 | 11 | 0 | 0 | 0 | 0 |
| 1 | 00 | 1 | 0 | 0 | 0 |
| 1 | 01 | 0 | 1 | 0 | 0 |
| 1 | 10 | 0 | 0 | 1 | 0 |
| 1 | 11 | 0 | 0 | 0 | 1 |

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nand2tetris-suite/projects/01/DMux4Way.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/DMux4Way.hdl
/**
* 4-way demultiplexor:
* {a, b, c, d} = {in, 0, 0, 0} if sel == 00
* {0, in, 0, 0} if sel == 01
* {0, 0, in, 0} if sel == 10
* {0, 0, 0, in} if sel == 11
*/
CHIP DMux4Way {
IN in, sel[2];
OUT a, b, c, d;
PARTS:
// Put your code here:
}

43
nand2tetris-suite/projects/01/DMux4Way.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/DMux4Way.tst
load DMux4Way.hdl,
output-file DMux4Way.out,
compare-to DMux4Way.cmp,
output-list in%B2.1.2 sel%B2.2.2 a%B2.1.2 b%B2.1.2 c%B2.1.2 d%B2.1.2;
set in 0,
set sel %B00,
eval,
output;
set sel %B01,
eval,
output;
set sel %B10,
eval,
output;
set sel %B11,
eval,
output;
set in 1,
set sel %B00,
eval,
output;
set sel %B01,
eval,
output;
set sel %B10,
eval,
output;
set sel %B11,
eval,
output;

17
nand2tetris-suite/projects/01/DMux8Way.cmp Normal file
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| in | sel | a | b | c | d | e | f | g | h |
| 0 | 000 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 001 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 010 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 011 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 100 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 101 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 110 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 1 | 000 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 1 | 001 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |
| 1 | 010 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
| 1 | 011 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
| 1 | 100 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
| 1 | 101 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| 1 | 110 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
| 1 | 111 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |

20
nand2tetris-suite/projects/01/DMux8Way.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/DMux8Way.hdl
/**
* 8-way demultiplexor:
* {a, b, c, d, e, f, g, h} = {in, 0, 0, 0, 0, 0, 0, 0} if sel == 000
* {0, in, 0, 0, 0, 0, 0, 0} if sel == 001
* etc.
* {0, 0, 0, 0, 0, 0, 0, in} if sel == 111
*/
CHIP DMux8Way {
IN in, sel[3];
OUT a, b, c, d, e, f, g, h;
PARTS:
// Put your code here:
}

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nand2tetris-suite/projects/01/DMux8Way.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/DMux8Way.tst
load DMux8Way.hdl,
output-file DMux8Way.out,
compare-to DMux8Way.cmp,
output-list in%B2.1.2 sel%B2.3.2 a%B2.1.2 b%B2.1.2 c%B2.1.2 d%B2.1.2 e%B2.1.2 f%B2.1.2 g%B2.1.2 h%B2.1.2;
set in 0,
set sel %B000,
eval,
output;
set sel %B001,
eval,
output;
set sel %B010,
eval,
output;
set sel %B011,
eval,
output;
set sel %B100,
eval,
output;
set sel %B101,
eval,
output;
set sel %B110,
eval,
output;
set sel %B111,
eval,
output;
set in 1,
set sel %B000,
eval,
output;
set sel %B001,
eval,
output;
set sel %B010,
eval,
output;
set sel %B011,
eval,
output;
set sel %B100,
eval,
output;
set sel %B101,
eval,
output;
set sel %B110,
eval,
output;
set sel %B111,
eval,
output;

9
nand2tetris-suite/projects/01/Mux.cmp Normal file
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| a | b | sel | out |
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 |

18
nand2tetris-suite/projects/01/Mux.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Mux.hdl
/**
* Multiplexor:
* out = a if sel == 0
* b otherwise
*/
CHIP Mux {
IN a, b, sel;
OUT out;
PARTS:
// Put your code here:
}

49
nand2tetris-suite/projects/01/Mux.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Mux.tst
load Mux.hdl,
output-file Mux.out,
compare-to Mux.cmp,
output-list a%B3.1.3 b%B3.1.3 sel%B3.1.3 out%B3.1.3;
set a 0,
set b 0,
set sel 0,
eval,
output;
set sel 1,
eval,
output;
set a 0,
set b 1,
set sel 0,
eval,
output;
set sel 1,
eval,
output;
set a 1,
set b 0,
set sel 0,
eval,
output;
set sel 1,
eval,
output;
set a 1,
set b 1,
set sel 0,
eval,
output;
set sel 1,
eval,
output;

9
nand2tetris-suite/projects/01/Mux16.cmp Normal file
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| a | b | sel | out |
| 0000000000000000 | 0000000000000000 | 0 | 0000000000000000 |
| 0000000000000000 | 0000000000000000 | 1 | 0000000000000000 |
| 0000000000000000 | 0001001000110100 | 0 | 0000000000000000 |
| 0000000000000000 | 0001001000110100 | 1 | 0001001000110100 |
| 1001100001110110 | 0000000000000000 | 0 | 1001100001110110 |
| 1001100001110110 | 0000000000000000 | 1 | 0000000000000000 |
| 1010101010101010 | 0101010101010101 | 0 | 1010101010101010 |
| 1010101010101010 | 0101010101010101 | 1 | 0101010101010101 |

18
nand2tetris-suite/projects/01/Mux16.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Mux16.hdl
/**
* 16-bit multiplexor:
* for i = 0..15 out[i] = a[i] if sel == 0
* b[i] if sel == 1
*/
CHIP Mux16 {
IN a[16], b[16], sel;
OUT out[16];
PARTS:
// Put your code here:
}

49
nand2tetris-suite/projects/01/Mux16.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Mux16.tst
load Mux16.hdl,
output-file Mux16.out,
compare-to Mux16.cmp,
output-list a%B1.16.1 b%B1.16.1 sel%D2.1.2 out%B1.16.1;
set a 0,
set b 0,
set sel 0,
eval,
output;
set sel 1,
eval,
output;
set a %B0000000000000000,
set b %B0001001000110100,
set sel 0,
eval,
output;
set sel 1,
eval,
output;
set a %B1001100001110110,
set b %B0000000000000000,
set sel 0,
eval,
output;
set sel 1,
eval,
output;
set a %B1010101010101010,
set b %B0101010101010101,
set sel 0,
eval,
output;
set sel 1,
eval,
output;

9
nand2tetris-suite/projects/01/Mux4Way16.cmp Normal file
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| a | b | c | d | sel | out |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 00 | 0000000000000000 |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 01 | 0000000000000000 |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 10 | 0000000000000000 |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 11 | 0000000000000000 |
| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 00 | 0001001000110100 |
| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 01 | 1001100001110110 |
| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 10 | 1010101010101010 |
| 0001001000110100 | 1001100001110110 | 1010101010101010 | 0101010101010101 | 11 | 0101010101010101 |

20
nand2tetris-suite/projects/01/Mux4Way16.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Mux4Way16.hdl
/**
* 4-way 16-bit multiplexor:
* out = a if sel == 00
* b if sel == 01
* c if sel == 10
* d if sel == 11
*/
CHIP Mux4Way16 {
IN a[16], b[16], c[16], d[16], sel[2];
OUT out[16];
PARTS:
// Put your code here:
}

49
nand2tetris-suite/projects/01/Mux4Way16.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Mux4Way16.tst
load Mux4Way16.hdl,
output-file Mux4Way16.out,
compare-to Mux4Way16.cmp,
output-list a%B1.16.1 b%B1.16.1 c%B1.16.1 d%B1.16.1 sel%B2.2.2 out%B1.16.1;
set a 0,
set b 0,
set c 0,
set d 0,
set sel 0,
eval,
output;
set sel 1,
eval,
output;
set sel 2,
eval,
output;
set sel 3,
eval,
output;
set a %B0001001000110100,
set b %B1001100001110110,
set c %B1010101010101010,
set d %B0101010101010101,
set sel 0,
eval,
output;
set sel 1,
eval,
output;
set sel 2,
eval,
output;
set sel 3,
eval,
output;

17
nand2tetris-suite/projects/01/Mux8Way16.cmp Normal file
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| a | b | c | d | e | f | g | h | sel | out |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 000 | 0000000000000000 |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 001 | 0000000000000000 |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 010 | 0000000000000000 |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 011 | 0000000000000000 |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 100 | 0000000000000000 |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 101 | 0000000000000000 |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 110 | 0000000000000000 |
| 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 0000000000000000 | 111 | 0000000000000000 |
| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 000 | 0001001000110100 |
| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 001 | 0010001101000101 |
| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 010 | 0011010001010110 |
| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 011 | 0100010101100111 |
| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 100 | 0101011001111000 |
| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 101 | 0110011110001001 |
| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 110 | 0111100010011010 |
| 0001001000110100 | 0010001101000101 | 0011010001010110 | 0100010101100111 | 0101011001111000 | 0110011110001001 | 0111100010011010 | 1000100110101011 | 111 | 1000100110101011 |

22
nand2tetris-suite/projects/01/Mux8Way16.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Mux8Way16.hdl
/**
* 8-way 16-bit multiplexor:
* out = a if sel == 000
* b if sel == 001
* etc.
* h if sel == 111
*/
CHIP Mux8Way16 {
IN a[16], b[16], c[16], d[16],
e[16], f[16], g[16], h[16],
sel[3];
OUT out[16];
PARTS:
// Put your code here:
}

89
nand2tetris-suite/projects/01/Mux8Way16.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Mux8Way16.tst
load Mux8Way16.hdl,
output-file Mux8Way16.out,
compare-to Mux8Way16.cmp,
output-list a%B1.16.1 b%B1.16.1 c%B1.16.1 d%B1.16.1 e%B1.16.1 f%B1.16.1 g%B1.16.1 h%B1.16.1 sel%B2.3.2 out%B1.16.1;
set a 0,
set b 0,
set c 0,
set d 0,
set e 0,
set f 0,
set g 0,
set h 0,
set sel 0,
eval,
output;
set sel 1,
eval,
output;
set sel 2,
eval,
output;
set sel 3,
eval,
output;
set sel 4,
eval,
output;
set sel 5,
eval,
output;
set sel 6,
eval,
output;
set sel 7,
eval,
output;
set a %B0001001000110100,
set b %B0010001101000101,
set c %B0011010001010110,
set d %B0100010101100111,
set e %B0101011001111000,
set f %B0110011110001001,
set g %B0111100010011010,
set h %B1000100110101011,
set sel 0,
eval,
output;
set sel 1,
eval,
output;
set sel 2,
eval,
output;
set sel 3,
eval,
output;
set sel 4,
eval,
output;
set sel 5,
eval,
output;
set sel 6,
eval,
output;
set sel 7,
eval,
output;

3
nand2tetris-suite/projects/01/Not.cmp Normal file
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@ -0,0 +1,3 @@
| in | out |
| 0 | 1 |
| 1 | 0 |

17
nand2tetris-suite/projects/01/Not.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Not.hdl
/**
* Not gate:
* out = not in
*/
CHIP Not {
IN in;
OUT out;
PARTS:
// Put your code here:
}

17
nand2tetris-suite/projects/01/Not.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Not.tst
load Not.hdl,
output-file Not.out,
compare-to Not.cmp,
output-list in%B3.1.3 out%B3.1.3;
set in 0,
eval,
output;
set in 1,
eval,
output;

6
nand2tetris-suite/projects/01/Not16.cmp Normal file
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| in | out |
| 0000000000000000 | 1111111111111111 |
| 1111111111111111 | 0000000000000000 |
| 1010101010101010 | 0101010101010101 |
| 0011110011000011 | 1100001100111100 |
| 0001001000110100 | 1110110111001011 |

17
nand2tetris-suite/projects/01/Not16.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Not16.hdl
/**
* 16-bit Not:
* for i=0..15: out[i] = not in[i]
*/
CHIP Not16 {
IN in[16];
OUT out[16];
PARTS:
// Put your code here:
}

29
nand2tetris-suite/projects/01/Not16.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Not16.tst
load Not16.hdl,
output-file Not16.out,
compare-to Not16.cmp,
output-list in%B1.16.1 out%B1.16.1;
set in %B0000000000000000,
eval,
output;
set in %B1111111111111111,
eval,
output;
set in %B1010101010101010,
eval,
output;
set in %B0011110011000011,
eval,
output;
set in %B0001001000110100,
eval,
output;

5
nand2tetris-suite/projects/01/Or.cmp Normal file
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| a | b | out |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |

18
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Or.hdl
/**
* Or gate:
* out = 1 if (a == 1 or b == 1)
* 0 otherwise
*/
CHIP Or {
IN a, b;
OUT out;
PARTS:
// Put your code here:
}

29
nand2tetris-suite/projects/01/Or.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Or.tst
load Or.hdl,
output-file Or.out,
compare-to Or.cmp,
output-list a%B3.1.3 b%B3.1.3 out%B3.1.3;
set a 0,
set b 0,
eval,
output;
set a 0,
set b 1,
eval,
output;
set a 1,
set b 0,
eval,
output;
set a 1,
set b 1,
eval,
output;

7
nand2tetris-suite/projects/01/Or16.cmp Normal file
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| a | b | out |
| 0000000000000000 | 0000000000000000 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1111111111111111 |
| 1111111111111111 | 1111111111111111 | 1111111111111111 |
| 1010101010101010 | 0101010101010101 | 1111111111111111 |
| 0011110011000011 | 0000111111110000 | 0011111111110011 |
| 0001001000110100 | 1001100001110110 | 1001101001110110 |

17
nand2tetris-suite/projects/01/Or16.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Or16.hdl
/**
* 16-bit bitwise Or:
* for i = 0..15 out[i] = (a[i] or b[i])
*/
CHIP Or16 {
IN a[16], b[16];
OUT out[16];
PARTS:
// Put your code here:
}

39
nand2tetris-suite/projects/01/Or16.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Or16.tst
load Or16.hdl,
output-file Or16.out,
compare-to Or16.cmp,
output-list a%B1.16.1 b%B1.16.1 out%B1.16.1;
set a %B0000000000000000,
set b %B0000000000000000,
eval,
output;
set a %B0000000000000000,
set b %B1111111111111111,
eval,
output;
set a %B1111111111111111,
set b %B1111111111111111,
eval,
output;
set a %B1010101010101010,
set b %B0101010101010101,
eval,
output;
set a %B0011110011000011,
set b %B0000111111110000,
eval,
output;
set a %B0001001000110100,
set b %B1001100001110110,
eval,
output;

6
nand2tetris-suite/projects/01/Or8Way.cmp Normal file
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| in | out |
| 00000000 | 0 |
| 11111111 | 1 |
| 00010000 | 1 |
| 00000001 | 1 |
| 00100110 | 1 |

17
nand2tetris-suite/projects/01/Or8Way.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Or8Way.hdl
/**
* 8-way Or:
* out = (in[0] or in[1] or ... or in[7])
*/
CHIP Or8Way {
IN in[8];
OUT out;
PARTS:
// Put your code here:
}

29
nand2tetris-suite/projects/01/Or8Way.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Or8Way.tst
load Or8Way.hdl,
output-file Or8Way.out,
compare-to Or8Way.cmp,
output-list in%B2.8.2 out%B2.1.2;
set in %B00000000,
eval,
output;
set in %B11111111,
eval,
output;
set in %B00010000,
eval,
output;
set in %B00000001,
eval,
output;
set in %B00100110,
eval,
output;

5
nand2tetris-suite/projects/01/Xor.cmp Normal file
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| a | b | out |
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |

17
nand2tetris-suite/projects/01/Xor.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Xor.hdl
/**
* Exclusive-or gate:
* out = not (a == b)
*/
CHIP Xor {
IN a, b;
OUT out;
PARTS:
// Put your code here:
}

29
nand2tetris-suite/projects/01/Xor.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Xor.tst
load Xor.hdl,
output-file Xor.out,
compare-to Xor.cmp,
output-list a%B3.1.3 b%B3.1.3 out%B3.1.3;
set a 0,
set b 0,
eval,
output;
set a 0,
set b 1,
eval,
output;
set a 1,
set b 0,
eval,
output;
set a 1,
set b 1,
eval,
output;

37
nand2tetris-suite/projects/02/ALU-nostat.cmp Normal file
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| x | y |zx |nx |zy |ny | f |no | out |
| 0000000000000000 | 1111111111111111 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 1 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 1 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 0 | 1111111111111110 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 1 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 1 | 0 | 1 | 1111111111111111 |
| 0101101110100000 | 0001111011010010 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 0 | 0101101110100000 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 0 | 0001111011010010 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 1 | 1010010001011111 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 1 | 1110000100101101 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 1 | 1010010001100000 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 1 | 1110000100101110 |
| 0101101110100000 | 0001111011010010 | 0 | 1 | 1 | 1 | 1 | 1 | 0101101110100001 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 1 | 1 | 1 | 0001111011010011 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 0 | 0101101110011111 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 0 | 0001111011010001 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 1 | 0 | 0111101001110010 |
| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 0 | 1 | 1 | 0011110011001110 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 1 | 1 | 1 | 1100001100110010 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 0 | 0 | 0001101010000000 |
| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 1 | 0 | 1 | 0101111111110010 |

353
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// This file is part of the materials accompanying the book
// "The Elements of Computing Systems" by Nisan and Schocken,
// MIT Press. Book site: www.idc.ac.il/tecs
// File name: projects/02/ALU-nostat.tst
// ALU-nostat.tst provides a partial test of the ALU chip.
// It IS NOT a replacement for ALU.tst.
// ALU-nostat.tst tests only the computation part of the ALU.
// The 'zr' and 'ng' status outputs are ignored.
// This test lets you concentrate on getting the ALU computation right without the
// additional task of handling the status outputs.
// Once your ALU passes ALU-nostat.tst you need to test it with ALU.tst.
// This way, any comparison failures during ALU.tst will be caused by errors in
// the handling of the 'zr' and 'ng' status outputs.
load ALU.hdl,
output-file ALU-nostat.out,
compare-to ALU-nostat.cmp,
output-list x%B1.16.1 y%B1.16.1 zx%B1.1.1 nx%B1.1.1 zy%B1.1.1
ny%B1.1.1 f%B1.1.1 no%B1.1.1 out%B1.16.1;
set x %B0000000000000000,
set y %B1111111111111111,
set zx 1,
set nx 0,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
set zx 0,
set nx 1,
set zy 0,
set ny 1,
set f 0,
set no 1,
eval,
output;
set x %B101101110100000,
set y %B001111011010010,
set zx 1,
set nx 0,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
set zx 0,
set nx 1,
set zy 0,
set ny 1,
set f 0,
set no 1,
eval,
output;

37
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| x | y |zx |nx |zy |ny | f |no | out |zr |ng |
| 0000000000000000 | 1111111111111111 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 1 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 1 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 0 | 1111111111111110 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 1 | 0 | 1 | 1111111111111111 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000010001 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 0 | 0 | 0000000000000011 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111101110 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 0 | 1 | 1111111111111100 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 1 | 1 | 1111111111101111 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 1 | 1 | 1111111111111101 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000010010 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000100 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 1 | 0 | 0000000000010000 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 1 | 0 | 0000000000000010 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 0 | 1 | 0 | 0000000000010100 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000001110 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111110010 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000001 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 1 | 0 | 1 | 0 | 1 | 0000000000010011 | 0 | 0 |

46
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/ALU.hdl
/**
* The ALU (Arithmetic Logic Unit).
* Computes one of the following functions:
* x+y, x-y, y-x, 0, 1, -1, x, y, -x, -y, !x, !y,
* x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs,
* according to 6 input bits denoted zx,nx,zy,ny,f,no.
* In addition, the ALU computes two 1-bit outputs:
* if the ALU output == 0, zr is set to 1; otherwise zr is set to 0;
* if the ALU output < 0, ng is set to 1; otherwise ng is set to 0.
*/
// Implementation: the ALU logic manipulates the x and y inputs
// and operates on the resulting values, as follows:
// if (zx == 1) set x = 0 // 16-bit constant
// if (nx == 1) set x = !x // bitwise not
// if (zy == 1) set y = 0 // 16-bit constant
// if (ny == 1) set y = !y // bitwise not
// if (f == 1) set out = x + y // integer 2's complement addition
// if (f == 0) set out = x & y // bitwise and
// if (no == 1) set out = !out // bitwise not
// if (out == 0) set zr = 1
// if (out < 0) set ng = 1
CHIP ALU {
IN
x[16], y[16], // 16-bit inputs
zx, // zero the x input?
nx, // negate the x input?
zy, // zero the y input?
ny, // negate the y input?
f, // compute out = x + y (if 1) or x & y (if 0)
no; // negate the out output?
OUT
out[16], // 16-bit output
zr, // 1 if (out == 0), 0 otherwise
ng; // 1 if (out < 0), 0 otherwise
PARTS:
// Put you code here:
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/ALU.tst
load ALU.hdl,
output-file ALU.out,
compare-to ALU.cmp,
output-list x%B1.16.1 y%B1.16.1 zx%B1.1.1 nx%B1.1.1 zy%B1.1.1
ny%B1.1.1 f%B1.1.1 no%B1.1.1 out%B1.16.1 zr%B1.1.1
ng%B1.1.1;
set x %B0000000000000000, // x = 0
set y %B1111111111111111; // y = -1
// Compute 0
set zx 1,
set nx 0,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute 1
set zx 1,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute -1
set zx 1,
set nx 1,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 0,
eval,
output;
// Compute y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
// Compute !x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 1,
eval,
output;
// Compute !y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 1,
eval,
output;
// Compute -x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute -y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
// Compute x + 1
set zx 0,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute y + 1
set zx 1,
set nx 1,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute x - 1
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 0,
eval,
output;
// Compute y - 1
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x + y
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x - y
set zx 0,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
// Compute y - x
set zx 0,
set nx 0,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute x & y
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
// Compute x | y
set zx 0,
set nx 1,
set zy 0,
set ny 1,
set f 0,
set no 1,
eval,
output;
set x %B000000000010001, // x = 17
set y %B000000000000011; // y = 3
// Compute 0
set zx 1,
set nx 0,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute 1
set zx 1,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute -1
set zx 1,
set nx 1,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 0,
eval,
output;
// Compute y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
// Compute !x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 1,
eval,
output;
// Compute !y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 1,
eval,
output;
// Compute -x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute -y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
// Compute x + 1
set zx 0,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute y + 1
set zx 1,
set nx 1,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute x - 1
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 0,
eval,
output;
// Compute y - 1
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x + y
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x - y
set zx 0,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
// Compute y - x
set zx 0,
set nx 0,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute x & y
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
// Compute x | y
set zx 0,
set nx 1,
set zy 0,
set ny 1,
set f 0,
set no 1,
eval,
output;

7
nand2tetris-suite/projects/02/Add16.cmp Normal file
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@ -0,0 +1,7 @@
| a | b | out |
| 0000000000000000 | 0000000000000000 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1111111111111111 |
| 1111111111111111 | 1111111111111111 | 1111111111111110 |
| 1010101010101010 | 0101010101010101 | 1111111111111111 |
| 0011110011000011 | 0000111111110000 | 0100110010110011 |
| 0001001000110100 | 1001100001110110 | 1010101010101010 |

17
nand2tetris-suite/projects/02/Add16.hdl Normal file
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@ -0,0 +1,17 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/Adder16.hdl
/**
* Adds two 16-bit values.
* The most significant carry bit is ignored.
*/
CHIP Add16 {
IN a[16], b[16];
OUT out[16];
PARTS:
// Put you code here:
}

39
nand2tetris-suite/projects/02/Add16.tst Normal file
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@ -0,0 +1,39 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/Add16.tst
load Add16.hdl,
output-file Add16.out,
compare-to Add16.cmp,
output-list a%B1.16.1 b%B1.16.1 out%B1.16.1;
set a %B0000000000000000,
set b %B0000000000000000,
eval,
output;
set a %B0000000000000000,
set b %B1111111111111111,
eval,
output;
set a %B1111111111111111,
set b %B1111111111111111,
eval,
output;
set a %B1010101010101010,
set b %B0101010101010101,
eval,
output;
set a %B0011110011000011,
set b %B0000111111110000,
eval,
output;
set a %B0001001000110100,
set b %B1001100001110110,
eval,
output;

9
nand2tetris-suite/projects/02/FullAdder.cmp Normal file
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@ -0,0 +1,9 @@
| a | b | c | sum | carry |
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |

17
nand2tetris-suite/projects/02/FullAdder.hdl Normal file
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@ -0,0 +1,17 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/FullAdder.hdl
/**
* Computes the sum of three bits.
*/
CHIP FullAdder {
IN a, b, c; // 1-bit inputs
OUT sum, // Right bit of a + b + c
carry; // Left bit of a + b + c
PARTS:
// Put you code here:
}

47
nand2tetris-suite/projects/02/FullAdder.tst Normal file
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@ -0,0 +1,47 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/FullAdder.tst
load FullAdder.hdl,
output-file FullAdder.out,
compare-to FullAdder.cmp,
output-list a%B3.1.3 b%B3.1.3 c%B3.1.3 sum%B3.1.3 carry%B3.1.3;
set a 0,
set b 0,
set c 0,
eval,
output;
set c 1,
eval,
output;
set b 1,
set c 0,
eval,
output;
set c 1,
eval,
output;
set a 1,
set b 0,
set c 0,
eval,
output;
set c 1,
eval,
output;
set b 1,
set c 0,
eval,
output;
set c 1,
eval,
output;

5
nand2tetris-suite/projects/02/HalfAdder.cmp Normal file
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@ -0,0 +1,5 @@
| a | b | sum | carry |
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |

17
nand2tetris-suite/projects/02/HalfAdder.hdl Normal file
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@ -0,0 +1,17 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/HalfAdder.hdl
/**
* Computes the sum of two bits.
*/
CHIP HalfAdder {
IN a, b; // 1-bit inputs
OUT sum, // Right bit of a + b
carry; // Left bit of a + b
PARTS:
// Put you code here:
}

29
nand2tetris-suite/projects/02/HalfAdder.tst Normal file
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@ -0,0 +1,29 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/HalfAdder.tst
load HalfAdder.hdl,
output-file HalfAdder.out,
compare-to HalfAdder.cmp,
output-list a%B3.1.3 b%B3.1.3 sum%B3.1.3 carry%B3.1.3;
set a 0,
set b 0,
eval,
output;
set a 0,
set b 1,
eval,
output;
set a 1,
set b 0,
eval,
output;
set a 1,
set b 1,
eval,
output;

5
nand2tetris-suite/projects/02/Inc16.cmp Normal file
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@ -0,0 +1,5 @@
| in | out |
| 0000000000000000 | 0000000000000001 |
| 1111111111111111 | 0000000000000000 |
| 0000000000000101 | 0000000000000110 |
| 1111111111111011 | 1111111111111100 |

17
nand2tetris-suite/projects/02/Inc16.hdl Normal file
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@ -0,0 +1,17 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/Inc16.hdl
/**
* 16-bit incrementer:
* out = in + 1 (arithmetic addition)
*/
CHIP Inc16 {
IN in[16];
OUT out[16];
PARTS:
// Put you code here:
}

25
nand2tetris-suite/projects/02/Inc16.tst Normal file
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@ -0,0 +1,25 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/Inc16.tst
load Inc16.hdl,
output-file Inc16.out,
compare-to Inc16.cmp,
output-list in%B1.16.1 out%B1.16.1;
set in %B0000000000000000, // in = 0
eval,
output;
set in %B1111111111111111, // in = -1
eval,
output;
set in %B0000000000000101, // in = 5
eval,
output;
set in %B1111111111111011, // in = -5
eval,
output;

215
nand2tetris-suite/projects/03/a/Bit.cmp Normal file
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@ -0,0 +1,215 @@
| time | in |load | out |
| 0+ | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 |
| 1+ | 0 | 1 | 0 |
| 2 | 0 | 1 | 0 |
| 2+ | 1 | 0 | 0 |
| 3 | 1 | 0 | 0 |
| 3+ | 1 | 1 | 0 |
| 4 | 1 | 1 | 1 |
| 4+ | 0 | 0 | 1 |
| 5 | 0 | 0 | 1 |
| 5+ | 1 | 0 | 1 |
| 6 | 1 | 0 | 1 |
| 6+ | 0 | 1 | 1 |
| 7 | 0 | 1 | 0 |
| 7+ | 1 | 1 | 0 |
| 8 | 1 | 1 | 1 |
| 8+ | 0 | 0 | 1 |
| 9 | 0 | 0 | 1 |
| 9+ | 0 | 0 | 1 |
| 10 | 0 | 0 | 1 |
| 10+ | 0 | 0 | 1 |
| 11 | 0 | 0 | 1 |
| 11+ | 0 | 0 | 1 |
| 12 | 0 | 0 | 1 |
| 12+ | 0 | 0 | 1 |
| 13 | 0 | 0 | 1 |
| 13+ | 0 | 0 | 1 |
| 14 | 0 | 0 | 1 |
| 14+ | 0 | 0 | 1 |
| 15 | 0 | 0 | 1 |
| 15+ | 0 | 0 | 1 |
| 16 | 0 | 0 | 1 |
| 16+ | 0 | 0 | 1 |
| 17 | 0 | 0 | 1 |
| 17+ | 0 | 0 | 1 |
| 18 | 0 | 0 | 1 |
| 18+ | 0 | 0 | 1 |
| 19 | 0 | 0 | 1 |
| 19+ | 0 | 0 | 1 |
| 20 | 0 | 0 | 1 |
| 20+ | 0 | 0 | 1 |
| 21 | 0 | 0 | 1 |
| 21+ | 0 | 0 | 1 |
| 22 | 0 | 0 | 1 |
| 22+ | 0 | 0 | 1 |
| 23 | 0 | 0 | 1 |
| 23+ | 0 | 0 | 1 |
| 24 | 0 | 0 | 1 |
| 24+ | 0 | 0 | 1 |
| 25 | 0 | 0 | 1 |
| 25+ | 0 | 0 | 1 |
| 26 | 0 | 0 | 1 |
| 26+ | 0 | 0 | 1 |
| 27 | 0 | 0 | 1 |
| 27+ | 0 | 0 | 1 |
| 28 | 0 | 0 | 1 |
| 28+ | 0 | 0 | 1 |
| 29 | 0 | 0 | 1 |
| 29+ | 0 | 0 | 1 |
| 30 | 0 | 0 | 1 |
| 30+ | 0 | 0 | 1 |
| 31 | 0 | 0 | 1 |
| 31+ | 0 | 0 | 1 |
| 32 | 0 | 0 | 1 |
| 32+ | 0 | 0 | 1 |
| 33 | 0 | 0 | 1 |
| 33+ | 0 | 0 | 1 |
| 34 | 0 | 0 | 1 |
| 34+ | 0 | 0 | 1 |
| 35 | 0 | 0 | 1 |
| 35+ | 0 | 0 | 1 |
| 36 | 0 | 0 | 1 |
| 36+ | 0 | 0 | 1 |
| 37 | 0 | 0 | 1 |
| 37+ | 0 | 0 | 1 |
| 38 | 0 | 0 | 1 |
| 38+ | 0 | 0 | 1 |
| 39 | 0 | 0 | 1 |
| 39+ | 0 | 0 | 1 |
| 40 | 0 | 0 | 1 |
| 40+ | 0 | 0 | 1 |
| 41 | 0 | 0 | 1 |
| 41+ | 0 | 0 | 1 |
| 42 | 0 | 0 | 1 |
| 42+ | 0 | 0 | 1 |
| 43 | 0 | 0 | 1 |
| 43+ | 0 | 0 | 1 |
| 44 | 0 | 0 | 1 |
| 44+ | 0 | 0 | 1 |
| 45 | 0 | 0 | 1 |
| 45+ | 0 | 0 | 1 |
| 46 | 0 | 0 | 1 |
| 46+ | 0 | 0 | 1 |
| 47 | 0 | 0 | 1 |
| 47+ | 0 | 0 | 1 |
| 48 | 0 | 0 | 1 |
| 48+ | 0 | 0 | 1 |
| 49 | 0 | 0 | 1 |
| 49+ | 0 | 0 | 1 |
| 50 | 0 | 0 | 1 |
| 50+ | 0 | 0 | 1 |
| 51 | 0 | 0 | 1 |
| 51+ | 0 | 0 | 1 |
| 52 | 0 | 0 | 1 |
| 52+ | 0 | 0 | 1 |
| 53 | 0 | 0 | 1 |
| 53+ | 0 | 0 | 1 |
| 54 | 0 | 0 | 1 |
| 54+ | 0 | 0 | 1 |
| 55 | 0 | 0 | 1 |
| 55+ | 0 | 0 | 1 |
| 56 | 0 | 0 | 1 |
| 56+ | 0 | 0 | 1 |
| 57 | 0 | 0 | 1 |
| 57+ | 0 | 1 | 1 |
| 58 | 0 | 1 | 0 |
| 58+ | 1 | 0 | 0 |
| 59 | 1 | 0 | 0 |
| 59+ | 1 | 0 | 0 |
| 60 | 1 | 0 | 0 |
| 60+ | 1 | 0 | 0 |
| 61 | 1 | 0 | 0 |
| 61+ | 1 | 0 | 0 |
| 62 | 1 | 0 | 0 |
| 62+ | 1 | 0 | 0 |
| 63 | 1 | 0 | 0 |
| 63+ | 1 | 0 | 0 |
| 64 | 1 | 0 | 0 |
| 64+ | 1 | 0 | 0 |
| 65 | 1 | 0 | 0 |
| 65+ | 1 | 0 | 0 |
| 66 | 1 | 0 | 0 |
| 66+ | 1 | 0 | 0 |
| 67 | 1 | 0 | 0 |
| 67+ | 1 | 0 | 0 |
| 68 | 1 | 0 | 0 |
| 68+ | 1 | 0 | 0 |
| 69 | 1 | 0 | 0 |
| 69+ | 1 | 0 | 0 |
| 70 | 1 | 0 | 0 |
| 70+ | 1 | 0 | 0 |
| 71 | 1 | 0 | 0 |
| 71+ | 1 | 0 | 0 |
| 72 | 1 | 0 | 0 |
| 72+ | 1 | 0 | 0 |
| 73 | 1 | 0 | 0 |
| 73+ | 1 | 0 | 0 |
| 74 | 1 | 0 | 0 |
| 74+ | 1 | 0 | 0 |
| 75 | 1 | 0 | 0 |
| 75+ | 1 | 0 | 0 |
| 76 | 1 | 0 | 0 |
| 76+ | 1 | 0 | 0 |
| 77 | 1 | 0 | 0 |
| 77+ | 1 | 0 | 0 |
| 78 | 1 | 0 | 0 |
| 78+ | 1 | 0 | 0 |
| 79 | 1 | 0 | 0 |
| 79+ | 1 | 0 | 0 |
| 80 | 1 | 0 | 0 |
| 80+ | 1 | 0 | 0 |
| 81 | 1 | 0 | 0 |
| 81+ | 1 | 0 | 0 |
| 82 | 1 | 0 | 0 |
| 82+ | 1 | 0 | 0 |
| 83 | 1 | 0 | 0 |
| 83+ | 1 | 0 | 0 |
| 84 | 1 | 0 | 0 |
| 84+ | 1 | 0 | 0 |
| 85 | 1 | 0 | 0 |
| 85+ | 1 | 0 | 0 |
| 86 | 1 | 0 | 0 |
| 86+ | 1 | 0 | 0 |
| 87 | 1 | 0 | 0 |
| 87+ | 1 | 0 | 0 |
| 88 | 1 | 0 | 0 |
| 88+ | 1 | 0 | 0 |
| 89 | 1 | 0 | 0 |
| 89+ | 1 | 0 | 0 |
| 90 | 1 | 0 | 0 |
| 90+ | 1 | 0 | 0 |
| 91 | 1 | 0 | 0 |
| 91+ | 1 | 0 | 0 |
| 92 | 1 | 0 | 0 |
| 92+ | 1 | 0 | 0 |
| 93 | 1 | 0 | 0 |
| 93+ | 1 | 0 | 0 |
| 94 | 1 | 0 | 0 |
| 94+ | 1 | 0 | 0 |
| 95 | 1 | 0 | 0 |
| 95+ | 1 | 0 | 0 |
| 96 | 1 | 0 | 0 |
| 96+ | 1 | 0 | 0 |
| 97 | 1 | 0 | 0 |
| 97+ | 1 | 0 | 0 |
| 98 | 1 | 0 | 0 |
| 98+ | 1 | 0 | 0 |
| 99 | 1 | 0 | 0 |
| 99+ | 1 | 0 | 0 |
| 100 | 1 | 0 | 0 |
| 100+ | 1 | 0 | 0 |
| 101 | 1 | 0 | 0 |
| 101+ | 1 | 0 | 0 |
| 102 | 1 | 0 | 0 |
| 102+ | 1 | 0 | 0 |
| 103 | 1 | 0 | 0 |
| 103+ | 1 | 0 | 0 |
| 104 | 1 | 0 | 0 |
| 104+ | 1 | 0 | 0 |
| 105 | 1 | 0 | 0 |
| 105+ | 1 | 0 | 0 |
| 106 | 1 | 0 | 0 |
| 106+ | 1 | 0 | 0 |
| 107 | 1 | 0 | 0 |

18
nand2tetris-suite/projects/03/a/Bit.hdl Normal file
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@ -0,0 +1,18 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/Bit.hdl
/**
* 1-bit register:
* If load[t] == 1 then out[t+1] = in[t]
* else out does not change (out[t+1] = out[t])
*/
CHIP Bit {
IN in, load;
OUT out;
PARTS:
// Put your code here:
}

865
nand2tetris-suite/projects/03/a/Bit.tst Normal file
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@ -0,0 +1,865 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/Bit.tst
load Bit.hdl,
output-file Bit.out,
compare-to Bit.cmp,
output-list time%S1.4.1 in%B2.1.2 load%B2.1.2 out%B2.1.2;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 1,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 1,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 1,
tick,
output;
tock,
output;
set in 1,
set load 1,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 1,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;
set in 1,
set load 0,
tick,
output;
tock,
output;

31
nand2tetris-suite/projects/03/a/PC.cmp Normal file
View File

@ -0,0 +1,31 @@
| time | in |reset|load | inc | out |
| 0+ | 0 | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 0 | 0 |
| 1+ | 0 | 0 | 0 | 1 | 0 |
| 2 | 0 | 0 | 0 | 1 | 1 |
| 2+ | -32123 | 0 | 0 | 1 | 1 |
| 3 | -32123 | 0 | 0 | 1 | 2 |
| 3+ | -32123 | 0 | 1 | 1 | 2 |
| 4 | -32123 | 0 | 1 | 1 | -32123 |
| 4+ | -32123 | 0 | 0 | 1 | -32123 |
| 5 | -32123 | 0 | 0 | 1 | -32122 |
| 5+ | -32123 | 0 | 0 | 1 | -32122 |
| 6 | -32123 | 0 | 0 | 1 | -32121 |
| 6+ | 12345 | 0 | 1 | 0 | -32121 |
| 7 | 12345 | 0 | 1 | 0 | 12345 |
| 7+ | 12345 | 1 | 1 | 0 | 12345 |
| 8 | 12345 | 1 | 1 | 0 | 0 |
| 8+ | 12345 | 0 | 1 | 1 | 0 |
| 9 | 12345 | 0 | 1 | 1 | 12345 |
| 9+ | 12345 | 1 | 1 | 1 | 12345 |
| 10 | 12345 | 1 | 1 | 1 | 0 |
| 10+ | 12345 | 0 | 0 | 1 | 0 |
| 11 | 12345 | 0 | 0 | 1 | 1 |
| 11+ | 12345 | 1 | 0 | 1 | 1 |
| 12 | 12345 | 1 | 0 | 1 | 0 |
| 12+ | 0 | 0 | 1 | 1 | 0 |
| 13 | 0 | 0 | 1 | 1 | 0 |
| 13+ | 0 | 0 | 0 | 1 | 0 |
| 14 | 0 | 0 | 0 | 1 | 1 |
| 14+ | 22222 | 1 | 0 | 0 | 1 |
| 15 | 22222 | 1 | 0 | 0 | 0 |

20
nand2tetris-suite/projects/03/a/PC.hdl Normal file
View File

@ -0,0 +1,20 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/PC.hdl
/**
* A 16-bit counter with load and reset control bits.
* if (reset[t] == 1) out[t+1] = 0
* else if (load[t] == 1) out[t+1] = in[t]
* else if (inc[t] == 1) out[t+1] = out[t] + 1 (integer addition)
* else out[t+1] = out[t]
*/
CHIP PC {
IN in[16],load,inc,reset;
OUT out[16];
PARTS:
// Put your code here:
}

125
nand2tetris-suite/projects/03/a/PC.tst Normal file
View File

@ -0,0 +1,125 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/PC.tst
load PC.hdl,
output-file PC.out,
compare-to PC.cmp,
output-list time%S1.4.1 in%D1.6.1 reset%B2.1.2 load%B2.1.2 inc%B2.1.2 out%D1.6.1;
set in 0,
set reset 0,
set load 0,
set inc 0,
tick,
output;
tock,
output;
set inc 1,
tick,
output;
tock,
output;
set in -32123,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set load 0,
tick,
output;
tock,
output;
tick,
output;
tock,
output;
set in 12345,
set load 1,
set inc 0,
tick,
output;
tock,
output;
set reset 1,
tick,
output;
tock,
output;
set reset 0,
set inc 1,
tick,
output;
tock,
output;
set reset 1,
tick,
output;
tock,
output;
set reset 0,
set load 0,
tick,
output;
tock,
output;
set reset 1,
tick,
output;
tock,
output;
set in 0,
set reset 0,
set load 1,
tick,
output;
tock,
output;
set load 0,
set inc 1,
tick,
output;
tock,
output;
set in 22222,
set reset 1,
set inc 0,
tick,
output;
tock,
output;

320
nand2tetris-suite/projects/03/a/RAM64.cmp Normal file
View File

@ -0,0 +1,320 @@
| time | in |load |address| out |
| 0+ | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 0 |
| 1+ | 0 | 1 | 0 | 0 |
| 2 | 0 | 1 | 0 | 0 |
| 2+ | 1313 | 0 | 0 | 0 |
| 3 | 1313 | 0 | 0 | 0 |
| 3+ | 1313 | 1 | 13 | 0 |
| 4 | 1313 | 1 | 13 | 1313 |
| 4+ | 1313 | 0 | 0 | 0 |
| 5 | 1313 | 0 | 0 | 0 |
| 5+ | 4747 | 0 | 47 | 0 |
| 6 | 4747 | 0 | 47 | 0 |
| 6+ | 4747 | 1 | 47 | 0 |
| 7 | 4747 | 1 | 47 | 4747 |
| 7+ | 4747 | 0 | 47 | 4747 |
| 8 | 4747 | 0 | 47 | 4747 |
| 8 | 4747 | 0 | 13 | 1313 |
| 8+ | 6363 | 0 | 13 | 1313 |
| 9 | 6363 | 0 | 13 | 1313 |
| 9+ | 6363 | 1 | 63 | 0 |
| 10 | 6363 | 1 | 63 | 6363 |
| 10+ | 6363 | 0 | 63 | 6363 |
| 11 | 6363 | 0 | 63 | 6363 |
| 11 | 6363 | 0 | 47 | 4747 |
| 11 | 6363 | 0 | 63 | 6363 |
| 11+ | 6363 | 0 | 40 | 0 |
| 12 | 6363 | 0 | 40 | 0 |
| 12 | 6363 | 0 | 41 | 0 |
| 12 | 6363 | 0 | 42 | 0 |
| 12 | 6363 | 0 | 43 | 0 |
| 12 | 6363 | 0 | 44 | 0 |
| 12 | 6363 | 0 | 45 | 0 |
| 12 | 6363 | 0 | 46 | 0 |
| 12 | 6363 | 0 | 47 | 4747 |
| 12+ | 21845 | 1 | 40 | 0 |
| 13 | 21845 | 1 | 40 | 21845 |
| 13+ | 21845 | 1 | 41 | 0 |
| 14 | 21845 | 1 | 41 | 21845 |
| 14+ | 21845 | 1 | 42 | 0 |
| 15 | 21845 | 1 | 42 | 21845 |
| 15+ | 21845 | 1 | 43 | 0 |
| 16 | 21845 | 1 | 43 | 21845 |
| 16+ | 21845 | 1 | 44 | 0 |
| 17 | 21845 | 1 | 44 | 21845 |
| 17+ | 21845 | 1 | 45 | 0 |
| 18 | 21845 | 1 | 45 | 21845 |
| 18+ | 21845 | 1 | 46 | 0 |
| 19 | 21845 | 1 | 46 | 21845 |
| 19+ | 21845 | 1 | 47 | 4747 |
| 20 | 21845 | 1 | 47 | 21845 |
| 20+ | 21845 | 0 | 40 | 21845 |
| 21 | 21845 | 0 | 40 | 21845 |
| 21 | 21845 | 0 | 41 | 21845 |
| 21 | 21845 | 0 | 42 | 21845 |
| 21 | 21845 | 0 | 43 | 21845 |
| 21 | 21845 | 0 | 44 | 21845 |
| 21 | 21845 | 0 | 45 | 21845 |
| 21 | 21845 | 0 | 46 | 21845 |
| 21 | 21845 | 0 | 47 | 21845 |
| 21+ | -21846 | 1 | 40 | 21845 |
| 22 | -21846 | 1 | 40 | -21846 |
| 22+ | -21846 | 0 | 40 | -21846 |
| 23 | -21846 | 0 | 40 | -21846 |
| 23 | -21846 | 0 | 41 | 21845 |
| 23 | -21846 | 0 | 42 | 21845 |
| 23 | -21846 | 0 | 43 | 21845 |
| 23 | -21846 | 0 | 44 | 21845 |
| 23 | -21846 | 0 | 45 | 21845 |
| 23 | -21846 | 0 | 46 | 21845 |
| 23 | -21846 | 0 | 47 | 21845 |
| 23+ | 21845 | 1 | 40 | -21846 |
| 24 | 21845 | 1 | 40 | 21845 |
| 24+ | -21846 | 1 | 41 | 21845 |
| 25 | -21846 | 1 | 41 | -21846 |
| 25+ | -21846 | 0 | 40 | 21845 |
| 26 | -21846 | 0 | 40 | 21845 |
| 26 | -21846 | 0 | 41 | -21846 |
| 26 | -21846 | 0 | 42 | 21845 |
| 26 | -21846 | 0 | 43 | 21845 |
| 26 | -21846 | 0 | 44 | 21845 |
| 26 | -21846 | 0 | 45 | 21845 |
| 26 | -21846 | 0 | 46 | 21845 |
| 26 | -21846 | 0 | 47 | 21845 |
| 26+ | 21845 | 1 | 41 | -21846 |
| 27 | 21845 | 1 | 41 | 21845 |
| 27+ | -21846 | 1 | 42 | 21845 |
| 28 | -21846 | 1 | 42 | -21846 |
| 28+ | -21846 | 0 | 40 | 21845 |
| 29 | -21846 | 0 | 40 | 21845 |
| 29 | -21846 | 0 | 41 | 21845 |
| 29 | -21846 | 0 | 42 | -21846 |
| 29 | -21846 | 0 | 43 | 21845 |
| 29 | -21846 | 0 | 44 | 21845 |
| 29 | -21846 | 0 | 45 | 21845 |
| 29 | -21846 | 0 | 46 | 21845 |
| 29 | -21846 | 0 | 47 | 21845 |
| 29+ | 21845 | 1 | 42 | -21846 |
| 30 | 21845 | 1 | 42 | 21845 |
| 30+ | -21846 | 1 | 43 | 21845 |
| 31 | -21846 | 1 | 43 | -21846 |
| 31+ | -21846 | 0 | 40 | 21845 |
| 32 | -21846 | 0 | 40 | 21845 |
| 32 | -21846 | 0 | 41 | 21845 |
| 32 | -21846 | 0 | 42 | 21845 |
| 32 | -21846 | 0 | 43 | -21846 |
| 32 | -21846 | 0 | 44 | 21845 |
| 32 | -21846 | 0 | 45 | 21845 |
| 32 | -21846 | 0 | 46 | 21845 |
| 32 | -21846 | 0 | 47 | 21845 |
| 32+ | 21845 | 1 | 43 | -21846 |
| 33 | 21845 | 1 | 43 | 21845 |
| 33+ | -21846 | 1 | 44 | 21845 |
| 34 | -21846 | 1 | 44 | -21846 |
| 34+ | -21846 | 0 | 40 | 21845 |
| 35 | -21846 | 0 | 40 | 21845 |
| 35 | -21846 | 0 | 41 | 21845 |
| 35 | -21846 | 0 | 42 | 21845 |
| 35 | -21846 | 0 | 43 | 21845 |
| 35 | -21846 | 0 | 44 | -21846 |
| 35 | -21846 | 0 | 45 | 21845 |
| 35 | -21846 | 0 | 46 | 21845 |
| 35 | -21846 | 0 | 47 | 21845 |
| 35+ | 21845 | 1 | 44 | -21846 |
| 36 | 21845 | 1 | 44 | 21845 |
| 36+ | -21846 | 1 | 45 | 21845 |
| 37 | -21846 | 1 | 45 | -21846 |
| 37+ | -21846 | 0 | 40 | 21845 |
| 38 | -21846 | 0 | 40 | 21845 |
| 38 | -21846 | 0 | 41 | 21845 |
| 38 | -21846 | 0 | 42 | 21845 |
| 38 | -21846 | 0 | 43 | 21845 |
| 38 | -21846 | 0 | 44 | 21845 |
| 38 | -21846 | 0 | 45 | -21846 |
| 38 | -21846 | 0 | 46 | 21845 |
| 38 | -21846 | 0 | 47 | 21845 |
| 38+ | 21845 | 1 | 45 | -21846 |
| 39 | 21845 | 1 | 45 | 21845 |
| 39+ | -21846 | 1 | 46 | 21845 |
| 40 | -21846 | 1 | 46 | -21846 |
| 40+ | -21846 | 0 | 40 | 21845 |
| 41 | -21846 | 0 | 40 | 21845 |
| 41 | -21846 | 0 | 41 | 21845 |
| 41 | -21846 | 0 | 42 | 21845 |
| 41 | -21846 | 0 | 43 | 21845 |
| 41 | -21846 | 0 | 44 | 21845 |
| 41 | -21846 | 0 | 45 | 21845 |
| 41 | -21846 | 0 | 46 | -21846 |
| 41 | -21846 | 0 | 47 | 21845 |
| 41+ | 21845 | 1 | 46 | -21846 |
| 42 | 21845 | 1 | 46 | 21845 |
| 42+ | -21846 | 1 | 47 | 21845 |
| 43 | -21846 | 1 | 47 | -21846 |
| 43+ | -21846 | 0 | 40 | 21845 |
| 44 | -21846 | 0 | 40 | 21845 |
| 44 | -21846 | 0 | 41 | 21845 |
| 44 | -21846 | 0 | 42 | 21845 |
| 44 | -21846 | 0 | 43 | 21845 |
| 44 | -21846 | 0 | 44 | 21845 |
| 44 | -21846 | 0 | 45 | 21845 |
| 44 | -21846 | 0 | 46 | 21845 |
| 44 | -21846 | 0 | 47 | -21846 |
| 44+ | 21845 | 1 | 47 | -21846 |
| 45 | 21845 | 1 | 47 | 21845 |
| 45+ | 21845 | 0 | 40 | 21845 |
| 46 | 21845 | 0 | 40 | 21845 |
| 46 | 21845 | 0 | 41 | 21845 |
| 46 | 21845 | 0 | 42 | 21845 |
| 46 | 21845 | 0 | 43 | 21845 |
| 46 | 21845 | 0 | 44 | 21845 |
| 46 | 21845 | 0 | 45 | 21845 |
| 46 | 21845 | 0 | 46 | 21845 |
| 46 | 21845 | 0 | 47 | 21845 |
| 46+ | 21845 | 0 | 5 | 0 |
| 47 | 21845 | 0 | 5 | 0 |
| 47 | 21845 | 0 | 13 | 1313 |
| 47 | 21845 | 0 | 21 | 0 |
| 47 | 21845 | 0 | 29 | 0 |
| 47 | 21845 | 0 | 37 | 0 |
| 47 | 21845 | 0 | 45 | 21845 |
| 47 | 21845 | 0 | 53 | 0 |
| 47 | 21845 | 0 | 61 | 0 |
| 47+ | 21845 | 1 | 5 | 0 |
| 48 | 21845 | 1 | 5 | 21845 |
| 48+ | 21845 | 1 | 13 | 1313 |
| 49 | 21845 | 1 | 13 | 21845 |
| 49+ | 21845 | 1 | 21 | 0 |
| 50 | 21845 | 1 | 21 | 21845 |
| 50+ | 21845 | 1 | 29 | 0 |
| 51 | 21845 | 1 | 29 | 21845 |
| 51+ | 21845 | 1 | 37 | 0 |
| 52 | 21845 | 1 | 37 | 21845 |
| 52+ | 21845 | 1 | 45 | 21845 |
| 53 | 21845 | 1 | 45 | 21845 |
| 53+ | 21845 | 1 | 53 | 0 |
| 54 | 21845 | 1 | 53 | 21845 |
| 54+ | 21845 | 1 | 61 | 0 |
| 55 | 21845 | 1 | 61 | 21845 |
| 55+ | 21845 | 0 | 5 | 21845 |
| 56 | 21845 | 0 | 5 | 21845 |
| 56 | 21845 | 0 | 13 | 21845 |
| 56 | 21845 | 0 | 21 | 21845 |
| 56 | 21845 | 0 | 29 | 21845 |
| 56 | 21845 | 0 | 37 | 21845 |
| 56 | 21845 | 0 | 45 | 21845 |
| 56 | 21845 | 0 | 53 | 21845 |
| 56 | 21845 | 0 | 61 | 21845 |
| 56+ | -21846 | 1 | 5 | 21845 |
| 57 | -21846 | 1 | 5 | -21846 |
| 57+ | -21846 | 0 | 5 | -21846 |
| 58 | -21846 | 0 | 5 | -21846 |
| 58 | -21846 | 0 | 13 | 21845 |
| 58 | -21846 | 0 | 21 | 21845 |
| 58 | -21846 | 0 | 29 | 21845 |
| 58 | -21846 | 0 | 37 | 21845 |
| 58 | -21846 | 0 | 45 | 21845 |
| 58 | -21846 | 0 | 53 | 21845 |
| 58 | -21846 | 0 | 61 | 21845 |
| 58+ | 21845 | 1 | 5 | -21846 |
| 59 | 21845 | 1 | 5 | 21845 |
| 59+ | -21846 | 1 | 13 | 21845 |
| 60 | -21846 | 1 | 13 | -21846 |
| 60+ | -21846 | 0 | 5 | 21845 |
| 61 | -21846 | 0 | 5 | 21845 |
| 61 | -21846 | 0 | 13 | -21846 |
| 61 | -21846 | 0 | 21 | 21845 |
| 61 | -21846 | 0 | 29 | 21845 |
| 61 | -21846 | 0 | 37 | 21845 |
| 61 | -21846 | 0 | 45 | 21845 |
| 61 | -21846 | 0 | 53 | 21845 |
| 61 | -21846 | 0 | 61 | 21845 |
| 61+ | 21845 | 1 | 13 | -21846 |
| 62 | 21845 | 1 | 13 | 21845 |
| 62+ | -21846 | 1 | 21 | 21845 |
| 63 | -21846 | 1 | 21 | -21846 |
| 63+ | -21846 | 0 | 5 | 21845 |
| 64 | -21846 | 0 | 5 | 21845 |
| 64 | -21846 | 0 | 13 | 21845 |
| 64 | -21846 | 0 | 21 | -21846 |
| 64 | -21846 | 0 | 29 | 21845 |
| 64 | -21846 | 0 | 37 | 21845 |
| 64 | -21846 | 0 | 45 | 21845 |
| 64 | -21846 | 0 | 53 | 21845 |
| 64 | -21846 | 0 | 61 | 21845 |
| 64+ | 21845 | 1 | 21 | -21846 |
| 65 | 21845 | 1 | 21 | 21845 |
| 65+ | -21846 | 1 | 29 | 21845 |
| 66 | -21846 | 1 | 29 | -21846 |
| 66+ | -21846 | 0 | 5 | 21845 |
| 67 | -21846 | 0 | 5 | 21845 |
| 67 | -21846 | 0 | 13 | 21845 |
| 67 | -21846 | 0 | 21 | 21845 |
| 67 | -21846 | 0 | 29 | -21846 |
| 67 | -21846 | 0 | 37 | 21845 |
| 67 | -21846 | 0 | 45 | 21845 |
| 67 | -21846 | 0 | 53 | 21845 |
| 67 | -21846 | 0 | 61 | 21845 |
| 67+ | 21845 | 1 | 29 | -21846 |
| 68 | 21845 | 1 | 29 | 21845 |
| 68+ | -21846 | 1 | 37 | 21845 |
| 69 | -21846 | 1 | 37 | -21846 |
| 69+ | -21846 | 0 | 5 | 21845 |
| 70 | -21846 | 0 | 5 | 21845 |
| 70 | -21846 | 0 | 13 | 21845 |
| 70 | -21846 | 0 | 21 | 21845 |
| 70 | -21846 | 0 | 29 | 21845 |
| 70 | -21846 | 0 | 37 | -21846 |
| 70 | -21846 | 0 | 45 | 21845 |
| 70 | -21846 | 0 | 53 | 21845 |
| 70 | -21846 | 0 | 61 | 21845 |
| 70+ | 21845 | 1 | 37 | -21846 |
| 71 | 21845 | 1 | 37 | 21845 |
| 71+ | -21846 | 1 | 45 | 21845 |
| 72 | -21846 | 1 | 45 | -21846 |
| 72+ | -21846 | 0 | 5 | 21845 |
| 73 | -21846 | 0 | 5 | 21845 |
| 73 | -21846 | 0 | 13 | 21845 |
| 73 | -21846 | 0 | 21 | 21845 |
| 73 | -21846 | 0 | 29 | 21845 |
| 73 | -21846 | 0 | 37 | 21845 |
| 73 | -21846 | 0 | 45 | -21846 |
| 73 | -21846 | 0 | 53 | 21845 |
| 73 | -21846 | 0 | 61 | 21845 |
| 73+ | 21845 | 1 | 45 | -21846 |
| 74 | 21845 | 1 | 45 | 21845 |
| 74+ | -21846 | 1 | 53 | 21845 |
| 75 | -21846 | 1 | 53 | -21846 |
| 75+ | -21846 | 0 | 5 | 21845 |
| 76 | -21846 | 0 | 5 | 21845 |
| 76 | -21846 | 0 | 13 | 21845 |
| 76 | -21846 | 0 | 21 | 21845 |
| 76 | -21846 | 0 | 29 | 21845 |
| 76 | -21846 | 0 | 37 | 21845 |
| 76 | -21846 | 0 | 45 | 21845 |
| 76 | -21846 | 0 | 53 | -21846 |
| 76 | -21846 | 0 | 61 | 21845 |
| 76+ | 21845 | 1 | 53 | -21846 |
| 77 | 21845 | 1 | 53 | 21845 |
| 77+ | -21846 | 1 | 61 | 21845 |
| 78 | -21846 | 1 | 61 | -21846 |
| 78+ | -21846 | 0 | 5 | 21845 |
| 79 | -21846 | 0 | 5 | 21845 |
| 79 | -21846 | 0 | 13 | 21845 |
| 79 | -21846 | 0 | 21 | 21845 |
| 79 | -21846 | 0 | 29 | 21845 |
| 79 | -21846 | 0 | 37 | 21845 |
| 79 | -21846 | 0 | 45 | 21845 |
| 79 | -21846 | 0 | 53 | 21845 |
| 79 | -21846 | 0 | 61 | -21846 |
| 79+ | 21845 | 1 | 61 | -21846 |
| 80 | 21845 | 1 | 61 | 21845 |
| 80+ | 21845 | 0 | 5 | 21845 |
| 81 | 21845 | 0 | 5 | 21845 |
| 81 | 21845 | 0 | 13 | 21845 |
| 81 | 21845 | 0 | 21 | 21845 |
| 81 | 21845 | 0 | 29 | 21845 |
| 81 | 21845 | 0 | 37 | 21845 |
| 81 | 21845 | 0 | 45 | 21845 |
| 81 | 21845 | 0 | 53 | 21845 |
| 81 | 21845 | 0 | 61 | 21845 |

19
nand2tetris-suite/projects/03/a/RAM64.hdl Normal file
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@ -0,0 +1,19 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/RAM64.hdl
/**
* Memory of 64 registers, each 16 bit-wide. Out holds the value
* stored at the memory location specified by address. If load==1, then
* the in value is loaded into the memory location specified by address
* (the loaded value will be emitted to out from the next time step onward).
*/
CHIP RAM64 {
IN in[16], load, address[6];
OUT out[16];
PARTS:
// Put your code here:
}

1026
nand2tetris-suite/projects/03/a/RAM64.tst Normal file
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File diff suppressed because it is too large Load Diff

173
nand2tetris-suite/projects/03/a/RAM8.cmp Normal file
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@ -0,0 +1,173 @@
| time | in |load |address| out |
| 0+ | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 0 |
| 1+ | 0 | 1 | 0 | 0 |
| 2 | 0 | 1 | 0 | 0 |
| 2+ | 11111 | 0 | 0 | 0 |
| 3 | 11111 | 0 | 0 | 0 |
| 3+ | 11111 | 1 | 1 | 0 |
| 4 | 11111 | 1 | 1 | 11111 |
| 4+ | 11111 | 0 | 0 | 0 |
| 5 | 11111 | 0 | 0 | 0 |
| 5+ | 3333 | 0 | 3 | 0 |
| 6 | 3333 | 0 | 3 | 0 |
| 6+ | 3333 | 1 | 3 | 0 |
| 7 | 3333 | 1 | 3 | 3333 |
| 7+ | 3333 | 0 | 3 | 3333 |
| 8 | 3333 | 0 | 3 | 3333 |
| 8 | 3333 | 0 | 1 | 11111 |
| 8+ | 7777 | 0 | 1 | 11111 |
| 9 | 7777 | 0 | 1 | 11111 |
| 9+ | 7777 | 1 | 7 | 0 |
| 10 | 7777 | 1 | 7 | 7777 |
| 10+ | 7777 | 0 | 7 | 7777 |
| 11 | 7777 | 0 | 7 | 7777 |
| 11 | 7777 | 0 | 3 | 3333 |
| 11 | 7777 | 0 | 7 | 7777 |
| 11+ | 7777 | 0 | 0 | 0 |
| 12 | 7777 | 0 | 0 | 0 |
| 12 | 7777 | 0 | 1 | 11111 |
| 12 | 7777 | 0 | 2 | 0 |
| 12 | 7777 | 0 | 3 | 3333 |
| 12 | 7777 | 0 | 4 | 0 |
| 12 | 7777 | 0 | 5 | 0 |
| 12 | 7777 | 0 | 6 | 0 |
| 12 | 7777 | 0 | 7 | 7777 |
| 12+ | 21845 | 1 | 0 | 0 |
| 13 | 21845 | 1 | 0 | 21845 |
| 13+ | 21845 | 1 | 1 | 11111 |
| 14 | 21845 | 1 | 1 | 21845 |
| 14+ | 21845 | 1 | 2 | 0 |
| 15 | 21845 | 1 | 2 | 21845 |
| 15+ | 21845 | 1 | 3 | 3333 |
| 16 | 21845 | 1 | 3 | 21845 |
| 16+ | 21845 | 1 | 4 | 0 |
| 17 | 21845 | 1 | 4 | 21845 |
| 17+ | 21845 | 1 | 5 | 0 |
| 18 | 21845 | 1 | 5 | 21845 |
| 18+ | 21845 | 1 | 6 | 0 |
| 19 | 21845 | 1 | 6 | 21845 |
| 19+ | 21845 | 1 | 7 | 7777 |
| 20 | 21845 | 1 | 7 | 21845 |
| 20+ | 21845 | 0 | 0 | 21845 |
| 21 | 21845 | 0 | 0 | 21845 |
| 21 | 21845 | 0 | 1 | 21845 |
| 21 | 21845 | 0 | 2 | 21845 |
| 21 | 21845 | 0 | 3 | 21845 |
| 21 | 21845 | 0 | 4 | 21845 |
| 21 | 21845 | 0 | 5 | 21845 |
| 21 | 21845 | 0 | 6 | 21845 |
| 21 | 21845 | 0 | 7 | 21845 |
| 21+ | -21846 | 1 | 0 | 21845 |
| 22 | -21846 | 1 | 0 | -21846 |
| 22+ | -21846 | 0 | 0 | -21846 |
| 23 | -21846 | 0 | 0 | -21846 |
| 23 | -21846 | 0 | 1 | 21845 |
| 23 | -21846 | 0 | 2 | 21845 |
| 23 | -21846 | 0 | 3 | 21845 |
| 23 | -21846 | 0 | 4 | 21845 |
| 23 | -21846 | 0 | 5 | 21845 |
| 23 | -21846 | 0 | 6 | 21845 |
| 23 | -21846 | 0 | 7 | 21845 |
| 23+ | 21845 | 1 | 0 | -21846 |
| 24 | 21845 | 1 | 0 | 21845 |
| 24+ | -21846 | 1 | 1 | 21845 |
| 25 | -21846 | 1 | 1 | -21846 |
| 25+ | -21846 | 0 | 0 | 21845 |
| 26 | -21846 | 0 | 0 | 21845 |
| 26 | -21846 | 0 | 1 | -21846 |
| 26 | -21846 | 0 | 2 | 21845 |
| 26 | -21846 | 0 | 3 | 21845 |
| 26 | -21846 | 0 | 4 | 21845 |
| 26 | -21846 | 0 | 5 | 21845 |
| 26 | -21846 | 0 | 6 | 21845 |
| 26 | -21846 | 0 | 7 | 21845 |
| 26+ | 21845 | 1 | 1 | -21846 |
| 27 | 21845 | 1 | 1 | 21845 |
| 27+ | -21846 | 1 | 2 | 21845 |
| 28 | -21846 | 1 | 2 | -21846 |
| 28+ | -21846 | 0 | 0 | 21845 |
| 29 | -21846 | 0 | 0 | 21845 |
| 29 | -21846 | 0 | 1 | 21845 |
| 29 | -21846 | 0 | 2 | -21846 |
| 29 | -21846 | 0 | 3 | 21845 |
| 29 | -21846 | 0 | 4 | 21845 |
| 29 | -21846 | 0 | 5 | 21845 |
| 29 | -21846 | 0 | 6 | 21845 |
| 29 | -21846 | 0 | 7 | 21845 |
| 29+ | 21845 | 1 | 2 | -21846 |
| 30 | 21845 | 1 | 2 | 21845 |
| 30+ | -21846 | 1 | 3 | 21845 |
| 31 | -21846 | 1 | 3 | -21846 |
| 31+ | -21846 | 0 | 0 | 21845 |
| 32 | -21846 | 0 | 0 | 21845 |
| 32 | -21846 | 0 | 1 | 21845 |
| 32 | -21846 | 0 | 2 | 21845 |
| 32 | -21846 | 0 | 3 | -21846 |
| 32 | -21846 | 0 | 4 | 21845 |
| 32 | -21846 | 0 | 5 | 21845 |
| 32 | -21846 | 0 | 6 | 21845 |
| 32 | -21846 | 0 | 7 | 21845 |
| 32+ | 21845 | 1 | 3 | -21846 |
| 33 | 21845 | 1 | 3 | 21845 |
| 33+ | -21846 | 1 | 4 | 21845 |
| 34 | -21846 | 1 | 4 | -21846 |
| 34+ | -21846 | 0 | 0 | 21845 |
| 35 | -21846 | 0 | 0 | 21845 |
| 35 | -21846 | 0 | 1 | 21845 |
| 35 | -21846 | 0 | 2 | 21845 |
| 35 | -21846 | 0 | 3 | 21845 |
| 35 | -21846 | 0 | 4 | -21846 |
| 35 | -21846 | 0 | 5 | 21845 |
| 35 | -21846 | 0 | 6 | 21845 |
| 35 | -21846 | 0 | 7 | 21845 |
| 35+ | 21845 | 1 | 4 | -21846 |
| 36 | 21845 | 1 | 4 | 21845 |
| 36+ | -21846 | 1 | 5 | 21845 |
| 37 | -21846 | 1 | 5 | -21846 |
| 37+ | -21846 | 0 | 0 | 21845 |
| 38 | -21846 | 0 | 0 | 21845 |
| 38 | -21846 | 0 | 1 | 21845 |
| 38 | -21846 | 0 | 2 | 21845 |
| 38 | -21846 | 0 | 3 | 21845 |
| 38 | -21846 | 0 | 4 | 21845 |
| 38 | -21846 | 0 | 5 | -21846 |
| 38 | -21846 | 0 | 6 | 21845 |
| 38 | -21846 | 0 | 7 | 21845 |
| 38+ | 21845 | 1 | 5 | -21846 |
| 39 | 21845 | 1 | 5 | 21845 |
| 39+ | -21846 | 1 | 6 | 21845 |
| 40 | -21846 | 1 | 6 | -21846 |
| 40+ | -21846 | 0 | 0 | 21845 |
| 41 | -21846 | 0 | 0 | 21845 |
| 41 | -21846 | 0 | 1 | 21845 |
| 41 | -21846 | 0 | 2 | 21845 |
| 41 | -21846 | 0 | 3 | 21845 |
| 41 | -21846 | 0 | 4 | 21845 |
| 41 | -21846 | 0 | 5 | 21845 |
| 41 | -21846 | 0 | 6 | -21846 |
| 41 | -21846 | 0 | 7 | 21845 |
| 41+ | 21845 | 1 | 6 | -21846 |
| 42 | 21845 | 1 | 6 | 21845 |
| 42+ | -21846 | 1 | 7 | 21845 |
| 43 | -21846 | 1 | 7 | -21846 |
| 43+ | -21846 | 0 | 0 | 21845 |
| 44 | -21846 | 0 | 0 | 21845 |
| 44 | -21846 | 0 | 1 | 21845 |
| 44 | -21846 | 0 | 2 | 21845 |
| 44 | -21846 | 0 | 3 | 21845 |
| 44 | -21846 | 0 | 4 | 21845 |
| 44 | -21846 | 0 | 5 | 21845 |
| 44 | -21846 | 0 | 6 | 21845 |
| 44 | -21846 | 0 | 7 | -21846 |
| 44+ | 21845 | 1 | 7 | -21846 |
| 45 | 21845 | 1 | 7 | 21845 |
| 45+ | 21845 | 0 | 0 | 21845 |
| 46 | 21845 | 0 | 0 | 21845 |
| 46 | 21845 | 0 | 1 | 21845 |
| 46 | 21845 | 0 | 2 | 21845 |
| 46 | 21845 | 0 | 3 | 21845 |
| 46 | 21845 | 0 | 4 | 21845 |
| 46 | 21845 | 0 | 5 | 21845 |
| 46 | 21845 | 0 | 6 | 21845 |
| 46 | 21845 | 0 | 7 | 21845 |

19
nand2tetris-suite/projects/03/a/RAM8.hdl Normal file
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@ -0,0 +1,19 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/RAM8.hdl
/**
* Memory of 8 registers, each 16 bit-wide. Out holds the value
* stored at the memory location specified by address. If load==1, then
* the in value is loaded into the memory location specified by address
* (the loaded value will be emitted to out from the next time step onward).
*/
CHIP RAM8 {
IN in[16], load, address[3];
OUT out[16];
PARTS:
// Put your code here:
}

560
nand2tetris-suite/projects/03/a/RAM8.tst Normal file
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@ -0,0 +1,560 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/RAM8.tst
load RAM8.hdl,
output-file RAM8.out,
compare-to RAM8.cmp,
output-list time%S1.4.1 in%D1.6.1 load%B2.1.2 address%D3.1.3 out%D1.6.1;
set in 0,
set load 0,
set address 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in 11111,
set load 0,
tick,
output;
tock,
output;
set load 1,
set address 1,
tick,
output;
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set in 3333,
set address 3,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set load 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set in 7777,
tick,
output;
tock,
output;
set load 1,
set address 7,
tick,
output;
tock,
output;
set load 0,
tick,
output;
tock,
output;
set address 3,
eval,
output;
set address 7,
eval,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set address 2,
eval,
output;
set address 3,
eval,
output;
set address 4,
eval,
output;
set address 5,
eval,
output;
set address 6,
eval,
output;
set address 7,
eval,
output;
set load 1,
set in %B0101010101010101,
set address 0,
tick,
output;
tock,
output;
set address 1,
tick,
output,
tock,
output;
set address 2,
tick,
output,
tock,
output;
set address 3,
tick,
output,
tock,
output;
set address 4,
tick,
output,
tock,
output;
set address 5,
tick,
output,
tock,
output;
set address 6,
tick,
output,
tock,
output;
set address 7,
tick,
output,
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set address 2,
eval,
output;
set address 3,
eval,
output;
set address 4,
eval,
output;
set address 5,
eval,
output;
set address 6,
eval,
output;
set address 7,
eval,
output;
set load 1,
set address 0,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set address 2,
eval,
output;
set address 3,
eval,
output;
set address 4,
eval,
output;
set address 5,
eval,
output;
set address 6,
eval,
output;
set address 7,
eval,
output;
set load 1,
set address 0,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address 1,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set address 2,
eval,
output;
set address 3,
eval,
output;
set address 4,
eval,
output;
set address 5,
eval,
output;
set address 6,
eval,
output;
set address 7,
eval,
output;
set load 1,
set address 1,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address 2,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set address 2,
eval,
output;
set address 3,
eval,
output;
set address 4,
eval,
output;
set address 5,
eval,
output;
set address 6,
eval,
output;
set address 7,
eval,
output;
set load 1,
set address 2,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address 3,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set address 2,
eval,
output;
set address 3,
eval,
output;
set address 4,
eval,
output;
set address 5,
eval,
output;
set address 6,
eval,
output;
set address 7,
eval,
output;
set load 1,
set address 3,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address 4,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set address 2,
eval,
output;
set address 3,
eval,
output;
set address 4,
eval,
output;
set address 5,
eval,
output;
set address 6,
eval,
output;
set address 7,
eval,
output;
set load 1,
set address 4,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address 5,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set address 2,
eval,
output;
set address 3,
eval,
output;
set address 4,
eval,
output;
set address 5,
eval,
output;
set address 6,
eval,
output;
set address 7,
eval,
output;
set load 1,
set address 5,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address 6,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set address 2,
eval,
output;
set address 3,
eval,
output;
set address 4,
eval,
output;
set address 5,
eval,
output;
set address 6,
eval,
output;
set address 7,
eval,
output;
set load 1,
set address 6,
set in %B0101010101010101,
tick,
output,
tock,
output;
set address 7,
set in %B1010101010101010,
tick,
output;
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set address 2,
eval,
output;
set address 3,
eval,
output;
set address 4,
eval,
output;
set address 5,
eval,
output;
set address 6,
eval,
output;
set address 7,
eval,
output;
set load 1,
set address 7,
set in %B0101010101010101,
tick,
output,
tock,
output;
set load 0,
set address 0,
tick,
output;
tock,
output;
set address 1,
eval,
output;
set address 2,
eval,
output;
set address 3,
eval,
output;
set address 4,
eval,
output;
set address 5,
eval,
output;
set address 6,
eval,
output;
set address 7,
eval,
output;

149
nand2tetris-suite/projects/03/a/Register.cmp Normal file
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@ -0,0 +1,149 @@
| time | in |load | out |
| 0+ | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 |
| 1+ | 0 | 1 | 0 |
| 2 | 0 | 1 | 0 |
| 2+ | -32123 | 0 | 0 |
| 3 | -32123 | 0 | 0 |
| 3+ | 11111 | 0 | 0 |
| 4 | 11111 | 0 | 0 |
| 4+ | -32123 | 1 | 0 |
| 5 | -32123 | 1 | -32123 |
| 5+ | -32123 | 1 | -32123 |
| 6 | -32123 | 1 | -32123 |
| 6+ | -32123 | 0 | -32123 |
| 7 | -32123 | 0 | -32123 |
| 7+ | 12345 | 1 | -32123 |
| 8 | 12345 | 1 | 12345 |
| 8+ | 0 | 0 | 12345 |
| 9 | 0 | 0 | 12345 |
| 9+ | 0 | 1 | 12345 |
| 10 | 0 | 1 | 0 |
| 10+ | 1 | 0 | 0 |
| 11 | 1 | 0 | 0 |
| 11+ | 1 | 1 | 0 |
| 12 | 1 | 1 | 1 |
| 12+ | 2 | 0 | 1 |
| 13 | 2 | 0 | 1 |
| 13+ | 2 | 1 | 1 |
| 14 | 2 | 1 | 2 |
| 14+ | 4 | 0 | 2 |
| 15 | 4 | 0 | 2 |
| 15+ | 4 | 1 | 2 |
| 16 | 4 | 1 | 4 |
| 16+ | 8 | 0 | 4 |
| 17 | 8 | 0 | 4 |
| 17+ | 8 | 1 | 4 |
| 18 | 8 | 1 | 8 |
| 18+ | 16 | 0 | 8 |
| 19 | 16 | 0 | 8 |
| 19+ | 16 | 1 | 8 |
| 20 | 16 | 1 | 16 |
| 20+ | 32 | 0 | 16 |
| 21 | 32 | 0 | 16 |
| 21+ | 32 | 1 | 16 |
| 22 | 32 | 1 | 32 |
| 22+ | 64 | 0 | 32 |
| 23 | 64 | 0 | 32 |
| 23+ | 64 | 1 | 32 |
| 24 | 64 | 1 | 64 |
| 24+ | 128 | 0 | 64 |
| 25 | 128 | 0 | 64 |
| 25+ | 128 | 1 | 64 |
| 26 | 128 | 1 | 128 |
| 26+ | 256 | 0 | 128 |
| 27 | 256 | 0 | 128 |
| 27+ | 256 | 1 | 128 |
| 28 | 256 | 1 | 256 |
| 28+ | 512 | 0 | 256 |
| 29 | 512 | 0 | 256 |
| 29+ | 512 | 1 | 256 |
| 30 | 512 | 1 | 512 |
| 30+ | 1024 | 0 | 512 |
| 31 | 1024 | 0 | 512 |
| 31+ | 1024 | 1 | 512 |
| 32 | 1024 | 1 | 1024 |
| 32+ | 2048 | 0 | 1024 |
| 33 | 2048 | 0 | 1024 |
| 33+ | 2048 | 1 | 1024 |
| 34 | 2048 | 1 | 2048 |
| 34+ | 4096 | 0 | 2048 |
| 35 | 4096 | 0 | 2048 |
| 35+ | 4096 | 1 | 2048 |
| 36 | 4096 | 1 | 4096 |
| 36+ | 8192 | 0 | 4096 |
| 37 | 8192 | 0 | 4096 |
| 37+ | 8192 | 1 | 4096 |
| 38 | 8192 | 1 | 8192 |
| 38+ | 16384 | 0 | 8192 |
| 39 | 16384 | 0 | 8192 |
| 39+ | 16384 | 1 | 8192 |
| 40 | 16384 | 1 | 16384 |
| 40+ | -32768 | 0 | 16384 |
| 41 | -32768 | 0 | 16384 |
| 41+ | -32768 | 1 | 16384 |
| 42 | -32768 | 1 | -32768 |
| 42+ | -2 | 0 | -32768 |
| 43 | -2 | 0 | -32768 |
| 43+ | -2 | 1 | -32768 |
| 44 | -2 | 1 | -2 |
| 44+ | -3 | 0 | -2 |
| 45 | -3 | 0 | -2 |
| 45+ | -3 | 1 | -2 |
| 46 | -3 | 1 | -3 |
| 46+ | -5 | 0 | -3 |
| 47 | -5 | 0 | -3 |
| 47+ | -5 | 1 | -3 |
| 48 | -5 | 1 | -5 |
| 48+ | -9 | 0 | -5 |
| 49 | -9 | 0 | -5 |
| 49+ | -9 | 1 | -5 |
| 50 | -9 | 1 | -9 |
| 50+ | -17 | 0 | -9 |
| 51 | -17 | 0 | -9 |
| 51+ | -17 | 1 | -9 |
| 52 | -17 | 1 | -17 |
| 52+ | -33 | 0 | -17 |
| 53 | -33 | 0 | -17 |
| 53+ | -33 | 1 | -17 |
| 54 | -33 | 1 | -33 |
| 54+ | -65 | 0 | -33 |
| 55 | -65 | 0 | -33 |
| 55+ | -65 | 1 | -33 |
| 56 | -65 | 1 | -65 |
| 56+ | -129 | 0 | -65 |
| 57 | -129 | 0 | -65 |
| 57+ | -129 | 1 | -65 |
| 58 | -129 | 1 | -129 |
| 58+ | -257 | 0 | -129 |
| 59 | -257 | 0 | -129 |
| 59+ | -257 | 1 | -129 |
| 60 | -257 | 1 | -257 |
| 60+ | -513 | 0 | -257 |
| 61 | -513 | 0 | -257 |
| 61+ | -513 | 1 | -257 |
| 62 | -513 | 1 | -513 |
| 62+ | -1025 | 0 | -513 |
| 63 | -1025 | 0 | -513 |
| 63+ | -1025 | 1 | -513 |
| 64 | -1025 | 1 | -1025 |
| 64+ | -2049 | 0 | -1025 |
| 65 | -2049 | 0 | -1025 |
| 65+ | -2049 | 1 | -1025 |
| 66 | -2049 | 1 | -2049 |
| 66+ | -4097 | 0 | -2049 |
| 67 | -4097 | 0 | -2049 |
| 67+ | -4097 | 1 | -2049 |
| 68 | -4097 | 1 | -4097 |
| 68+ | -8193 | 0 | -4097 |
| 69 | -8193 | 0 | -4097 |
| 69+ | -8193 | 1 | -4097 |
| 70 | -8193 | 1 | -8193 |
| 70+ | -16385 | 0 | -8193 |
| 71 | -16385 | 0 | -8193 |
| 71+ | -16385 | 1 | -8193 |
| 72 | -16385 | 1 | -16385 |
| 72+ | 32767 | 0 | -16385 |
| 73 | 32767 | 0 | -16385 |
| 73+ | 32767 | 1 | -16385 |
| 74 | 32767 | 1 | 32767 |

18
nand2tetris-suite/projects/03/a/Register.hdl Normal file
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@ -0,0 +1,18 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/Register.hdl
/**
* 16-bit register:
* If load[t] == 1 then out[t+1] = in[t]
* else out does not change
*/
CHIP Register {
IN in[16], load;
OUT out[16];
PARTS:
// Put your code here:
}

569
nand2tetris-suite/projects/03/a/Register.tst Normal file
View File

@ -0,0 +1,569 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/Register.tst
load Register.hdl,
output-file Register.out,
compare-to Register.cmp,
output-list time%S1.4.1 in%D1.6.1 load%B2.1.2 out%D1.6.1;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 1,
tick,
output;
tock,
output;
set in -32123,
set load 0,
tick,
output;
tock,
output;
set in 11111,
set load 0,
tick,
output;
tock,
output;
set in -32123,
set load 1,
tick,
output;
tock,
output;
set in -32123,
set load 1,
tick,
output;
tock,
output;
set in -32123,
set load 0,
tick,
output;
tock,
output;
set in 12345,
set load 1,
tick,
output;
tock,
output;
set in 0,
set load 0,
tick,
output;
tock,
output;
set in 0,
set load 1,
tick,
output;
tock,
output;
set in %B0000000000000001,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0000000000000010,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0000000000000100,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0000000000001000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0000000000010000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0000000000100000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0000000001000000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0000000010000000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0000000100000000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0000001000000000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0000010000000000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0000100000000000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0001000000000000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0010000000000000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0100000000000000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1000000000000000,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111111111111110,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111111111111101,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111111111111011,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111111111110111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111111111101111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111111111011111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111111110111111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111111101111111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111111011111111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111110111111111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111101111111111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1111011111111111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1110111111111111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1101111111111111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B1011111111111111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;
set in %B0111111111111111,
set load 0,
tick,
output;
tock,
output;
set load 1,
tick,
output;
tock,
output;

320
nand2tetris-suite/projects/03/b/RAM16K.cmp Normal file
View File

@ -0,0 +1,320 @@
| time | in |load | address | out |
| 0+ | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 0 |
| 1+ | 0 | 1 | 0 | 0 |
| 2 | 0 | 1 | 0 | 0 |
| 2+ | 4321 | 0 | 0 | 0 |
| 3 | 4321 | 0 | 0 | 0 |
| 3+ | 4321 | 1 | 4321 | 0 |
| 4 | 4321 | 1 | 4321 | 4321 |
| 4+ | 4321 | 0 | 0 | 0 |
| 5 | 4321 | 0 | 0 | 0 |
| 5+ | 12345 | 0 | 12345 | 0 |
| 6 | 12345 | 0 | 12345 | 0 |
| 6+ | 12345 | 1 | 12345 | 0 |
| 7 | 12345 | 1 | 12345 | 12345 |
| 7+ | 12345 | 0 | 12345 | 12345 |
| 8 | 12345 | 0 | 12345 | 12345 |
| 8 | 12345 | 0 | 4321 | 4321 |
| 8+ | 16383 | 0 | 4321 | 4321 |
| 9 | 16383 | 0 | 4321 | 4321 |
| 9+ | 16383 | 1 | 16383 | 0 |
| 10 | 16383 | 1 | 16383 | 16383 |
| 10+ | 16383 | 0 | 16383 | 16383 |
| 11 | 16383 | 0 | 16383 | 16383 |
| 11 | 16383 | 0 | 12345 | 12345 |
| 11 | 16383 | 0 | 16383 | 16383 |
| 11+ | 16383 | 0 | 10920 | 0 |
| 12 | 16383 | 0 | 10920 | 0 |
| 12 | 16383 | 0 | 10921 | 0 |
| 12 | 16383 | 0 | 10922 | 0 |
| 12 | 16383 | 0 | 10923 | 0 |
| 12 | 16383 | 0 | 10924 | 0 |
| 12 | 16383 | 0 | 10925 | 0 |
| 12 | 16383 | 0 | 10926 | 0 |
| 12 | 16383 | 0 | 10927 | 0 |
| 12+ | 21845 | 1 | 10920 | 0 |
| 13 | 21845 | 1 | 10920 | 21845 |
| 13+ | 21845 | 1 | 10921 | 0 |
| 14 | 21845 | 1 | 10921 | 21845 |
| 14+ | 21845 | 1 | 10922 | 0 |
| 15 | 21845 | 1 | 10922 | 21845 |
| 15+ | 21845 | 1 | 10923 | 0 |
| 16 | 21845 | 1 | 10923 | 21845 |
| 16+ | 21845 | 1 | 10924 | 0 |
| 17 | 21845 | 1 | 10924 | 21845 |
| 17+ | 21845 | 1 | 10925 | 0 |
| 18 | 21845 | 1 | 10925 | 21845 |
| 18+ | 21845 | 1 | 10926 | 0 |
| 19 | 21845 | 1 | 10926 | 21845 |
| 19+ | 21845 | 1 | 10927 | 0 |
| 20 | 21845 | 1 | 10927 | 21845 |
| 20+ | 21845 | 0 | 10920 | 21845 |
| 21 | 21845 | 0 | 10920 | 21845 |
| 21 | 21845 | 0 | 10921 | 21845 |
| 21 | 21845 | 0 | 10922 | 21845 |
| 21 | 21845 | 0 | 10923 | 21845 |
| 21 | 21845 | 0 | 10924 | 21845 |
| 21 | 21845 | 0 | 10925 | 21845 |
| 21 | 21845 | 0 | 10926 | 21845 |
| 21 | 21845 | 0 | 10927 | 21845 |
| 21+ | -21846 | 1 | 10920 | 21845 |
| 22 | -21846 | 1 | 10920 | -21846 |
| 22+ | -21846 | 0 | 10920 | -21846 |
| 23 | -21846 | 0 | 10920 | -21846 |
| 23 | -21846 | 0 | 10921 | 21845 |
| 23 | -21846 | 0 | 10922 | 21845 |
| 23 | -21846 | 0 | 10923 | 21845 |
| 23 | -21846 | 0 | 10924 | 21845 |
| 23 | -21846 | 0 | 10925 | 21845 |
| 23 | -21846 | 0 | 10926 | 21845 |
| 23 | -21846 | 0 | 10927 | 21845 |
| 23+ | 21845 | 1 | 10920 | -21846 |
| 24 | 21845 | 1 | 10920 | 21845 |
| 24+ | -21846 | 1 | 10921 | 21845 |
| 25 | -21846 | 1 | 10921 | -21846 |
| 25+ | -21846 | 0 | 10920 | 21845 |
| 26 | -21846 | 0 | 10920 | 21845 |
| 26 | -21846 | 0 | 10921 | -21846 |
| 26 | -21846 | 0 | 10922 | 21845 |
| 26 | -21846 | 0 | 10923 | 21845 |
| 26 | -21846 | 0 | 10924 | 21845 |
| 26 | -21846 | 0 | 10925 | 21845 |
| 26 | -21846 | 0 | 10926 | 21845 |
| 26 | -21846 | 0 | 10927 | 21845 |
| 26+ | 21845 | 1 | 10921 | -21846 |
| 27 | 21845 | 1 | 10921 | 21845 |
| 27+ | -21846 | 1 | 10922 | 21845 |
| 28 | -21846 | 1 | 10922 | -21846 |
| 28+ | -21846 | 0 | 10920 | 21845 |
| 29 | -21846 | 0 | 10920 | 21845 |
| 29 | -21846 | 0 | 10921 | 21845 |
| 29 | -21846 | 0 | 10922 | -21846 |
| 29 | -21846 | 0 | 10923 | 21845 |
| 29 | -21846 | 0 | 10924 | 21845 |
| 29 | -21846 | 0 | 10925 | 21845 |
| 29 | -21846 | 0 | 10926 | 21845 |
| 29 | -21846 | 0 | 10927 | 21845 |
| 29+ | 21845 | 1 | 10922 | -21846 |
| 30 | 21845 | 1 | 10922 | 21845 |
| 30+ | -21846 | 1 | 10923 | 21845 |
| 31 | -21846 | 1 | 10923 | -21846 |
| 31+ | -21846 | 0 | 10920 | 21845 |
| 32 | -21846 | 0 | 10920 | 21845 |
| 32 | -21846 | 0 | 10921 | 21845 |
| 32 | -21846 | 0 | 10922 | 21845 |
| 32 | -21846 | 0 | 10923 | -21846 |
| 32 | -21846 | 0 | 10924 | 21845 |
| 32 | -21846 | 0 | 10925 | 21845 |
| 32 | -21846 | 0 | 10926 | 21845 |
| 32 | -21846 | 0 | 10927 | 21845 |
| 32+ | 21845 | 1 | 10923 | -21846 |
| 33 | 21845 | 1 | 10923 | 21845 |
| 33+ | -21846 | 1 | 10924 | 21845 |
| 34 | -21846 | 1 | 10924 | -21846 |
| 34+ | -21846 | 0 | 10920 | 21845 |
| 35 | -21846 | 0 | 10920 | 21845 |
| 35 | -21846 | 0 | 10921 | 21845 |
| 35 | -21846 | 0 | 10922 | 21845 |
| 35 | -21846 | 0 | 10923 | 21845 |
| 35 | -21846 | 0 | 10924 | -21846 |
| 35 | -21846 | 0 | 10925 | 21845 |
| 35 | -21846 | 0 | 10926 | 21845 |
| 35 | -21846 | 0 | 10927 | 21845 |
| 35+ | 21845 | 1 | 10924 | -21846 |
| 36 | 21845 | 1 | 10924 | 21845 |
| 36+ | -21846 | 1 | 10925 | 21845 |
| 37 | -21846 | 1 | 10925 | -21846 |
| 37+ | -21846 | 0 | 10920 | 21845 |
| 38 | -21846 | 0 | 10920 | 21845 |
| 38 | -21846 | 0 | 10921 | 21845 |
| 38 | -21846 | 0 | 10922 | 21845 |
| 38 | -21846 | 0 | 10923 | 21845 |
| 38 | -21846 | 0 | 10924 | 21845 |
| 38 | -21846 | 0 | 10925 | -21846 |
| 38 | -21846 | 0 | 10926 | 21845 |
| 38 | -21846 | 0 | 10927 | 21845 |
| 38+ | 21845 | 1 | 10925 | -21846 |
| 39 | 21845 | 1 | 10925 | 21845 |
| 39+ | -21846 | 1 | 10926 | 21845 |
| 40 | -21846 | 1 | 10926 | -21846 |
| 40+ | -21846 | 0 | 10920 | 21845 |
| 41 | -21846 | 0 | 10920 | 21845 |
| 41 | -21846 | 0 | 10921 | 21845 |
| 41 | -21846 | 0 | 10922 | 21845 |
| 41 | -21846 | 0 | 10923 | 21845 |
| 41 | -21846 | 0 | 10924 | 21845 |
| 41 | -21846 | 0 | 10925 | 21845 |
| 41 | -21846 | 0 | 10926 | -21846 |
| 41 | -21846 | 0 | 10927 | 21845 |
| 41+ | 21845 | 1 | 10926 | -21846 |
| 42 | 21845 | 1 | 10926 | 21845 |
| 42+ | -21846 | 1 | 10927 | 21845 |
| 43 | -21846 | 1 | 10927 | -21846 |
| 43+ | -21846 | 0 | 10920 | 21845 |
| 44 | -21846 | 0 | 10920 | 21845 |
| 44 | -21846 | 0 | 10921 | 21845 |
| 44 | -21846 | 0 | 10922 | 21845 |
| 44 | -21846 | 0 | 10923 | 21845 |
| 44 | -21846 | 0 | 10924 | 21845 |
| 44 | -21846 | 0 | 10925 | 21845 |
| 44 | -21846 | 0 | 10926 | 21845 |
| 44 | -21846 | 0 | 10927 | -21846 |
| 44+ | 21845 | 1 | 10927 | -21846 |
| 45 | 21845 | 1 | 10927 | 21845 |
| 45+ | 21845 | 0 | 10920 | 21845 |
| 46 | 21845 | 0 | 10920 | 21845 |
| 46 | 21845 | 0 | 10921 | 21845 |
| 46 | 21845 | 0 | 10922 | 21845 |
| 46 | 21845 | 0 | 10923 | 21845 |
| 46 | 21845 | 0 | 10924 | 21845 |
| 46 | 21845 | 0 | 10925 | 21845 |
| 46 | 21845 | 0 | 10926 | 21845 |
| 46 | 21845 | 0 | 10927 | 21845 |
| 46+ | 21845 | 0 | 1365 | 0 |
| 47 | 21845 | 0 | 1365 | 0 |
| 47 | 21845 | 0 | 3413 | 0 |
| 47 | 21845 | 0 | 5461 | 0 |
| 47 | 21845 | 0 | 7509 | 0 |
| 47 | 21845 | 0 | 9557 | 0 |
| 47 | 21845 | 0 | 11605 | 0 |
| 47 | 21845 | 0 | 13653 | 0 |
| 47 | 21845 | 0 | 15701 | 0 |
| 47+ | 21845 | 1 | 1365 | 0 |
| 48 | 21845 | 1 | 1365 | 21845 |
| 48+ | 21845 | 1 | 3413 | 0 |
| 49 | 21845 | 1 | 3413 | 21845 |
| 49+ | 21845 | 1 | 5461 | 0 |
| 50 | 21845 | 1 | 5461 | 21845 |
| 50+ | 21845 | 1 | 7509 | 0 |
| 51 | 21845 | 1 | 7509 | 21845 |
| 51+ | 21845 | 1 | 9557 | 0 |
| 52 | 21845 | 1 | 9557 | 21845 |
| 52+ | 21845 | 1 | 11605 | 0 |
| 53 | 21845 | 1 | 11605 | 21845 |
| 53+ | 21845 | 1 | 13653 | 0 |
| 54 | 21845 | 1 | 13653 | 21845 |
| 54+ | 21845 | 1 | 15701 | 0 |
| 55 | 21845 | 1 | 15701 | 21845 |
| 55+ | 21845 | 0 | 1365 | 21845 |
| 56 | 21845 | 0 | 1365 | 21845 |
| 56 | 21845 | 0 | 3413 | 21845 |
| 56 | 21845 | 0 | 5461 | 21845 |
| 56 | 21845 | 0 | 7509 | 21845 |
| 56 | 21845 | 0 | 9557 | 21845 |
| 56 | 21845 | 0 | 11605 | 21845 |
| 56 | 21845 | 0 | 13653 | 21845 |
| 56 | 21845 | 0 | 15701 | 21845 |
| 56+ | -21846 | 1 | 1365 | 21845 |
| 57 | -21846 | 1 | 1365 | -21846 |
| 57+ | -21846 | 0 | 1365 | -21846 |
| 58 | -21846 | 0 | 1365 | -21846 |
| 58 | -21846 | 0 | 3413 | 21845 |
| 58 | -21846 | 0 | 5461 | 21845 |
| 58 | -21846 | 0 | 7509 | 21845 |
| 58 | -21846 | 0 | 9557 | 21845 |
| 58 | -21846 | 0 | 11605 | 21845 |
| 58 | -21846 | 0 | 13653 | 21845 |
| 58 | -21846 | 0 | 15701 | 21845 |
| 58+ | 21845 | 1 | 1365 | -21846 |
| 59 | 21845 | 1 | 1365 | 21845 |
| 59+ | -21846 | 1 | 3413 | 21845 |
| 60 | -21846 | 1 | 3413 | -21846 |
| 60+ | -21846 | 0 | 1365 | 21845 |
| 61 | -21846 | 0 | 1365 | 21845 |
| 61 | -21846 | 0 | 3413 | -21846 |
| 61 | -21846 | 0 | 5461 | 21845 |
| 61 | -21846 | 0 | 7509 | 21845 |
| 61 | -21846 | 0 | 9557 | 21845 |
| 61 | -21846 | 0 | 11605 | 21845 |
| 61 | -21846 | 0 | 13653 | 21845 |
| 61 | -21846 | 0 | 15701 | 21845 |
| 61+ | 21845 | 1 | 3413 | -21846 |
| 62 | 21845 | 1 | 3413 | 21845 |
| 62+ | -21846 | 1 | 5461 | 21845 |
| 63 | -21846 | 1 | 5461 | -21846 |
| 63+ | -21846 | 0 | 1365 | 21845 |
| 64 | -21846 | 0 | 1365 | 21845 |
| 64 | -21846 | 0 | 3413 | 21845 |
| 64 | -21846 | 0 | 5461 | -21846 |
| 64 | -21846 | 0 | 7509 | 21845 |
| 64 | -21846 | 0 | 9557 | 21845 |
| 64 | -21846 | 0 | 11605 | 21845 |
| 64 | -21846 | 0 | 13653 | 21845 |
| 64 | -21846 | 0 | 15701 | 21845 |
| 64+ | 21845 | 1 | 5461 | -21846 |
| 65 | 21845 | 1 | 5461 | 21845 |
| 65+ | -21846 | 1 | 7509 | 21845 |
| 66 | -21846 | 1 | 7509 | -21846 |
| 66+ | -21846 | 0 | 1365 | 21845 |
| 67 | -21846 | 0 | 1365 | 21845 |
| 67 | -21846 | 0 | 3413 | 21845 |
| 67 | -21846 | 0 | 5461 | 21845 |
| 67 | -21846 | 0 | 7509 | -21846 |
| 67 | -21846 | 0 | 9557 | 21845 |
| 67 | -21846 | 0 | 11605 | 21845 |
| 67 | -21846 | 0 | 13653 | 21845 |
| 67 | -21846 | 0 | 15701 | 21845 |
| 67+ | 21845 | 1 | 7509 | -21846 |
| 68 | 21845 | 1 | 7509 | 21845 |
| 68+ | -21846 | 1 | 9557 | 21845 |
| 69 | -21846 | 1 | 9557 | -21846 |
| 69+ | -21846 | 0 | 1365 | 21845 |
| 70 | -21846 | 0 | 1365 | 21845 |
| 70 | -21846 | 0 | 3413 | 21845 |
| 70 | -21846 | 0 | 5461 | 21845 |
| 70 | -21846 | 0 | 7509 | 21845 |
| 70 | -21846 | 0 | 9557 | -21846 |
| 70 | -21846 | 0 | 11605 | 21845 |
| 70 | -21846 | 0 | 13653 | 21845 |
| 70 | -21846 | 0 | 15701 | 21845 |
| 70+ | 21845 | 1 | 9557 | -21846 |
| 71 | 21845 | 1 | 9557 | 21845 |
| 71+ | -21846 | 1 | 11605 | 21845 |
| 72 | -21846 | 1 | 11605 | -21846 |
| 72+ | -21846 | 0 | 1365 | 21845 |
| 73 | -21846 | 0 | 1365 | 21845 |
| 73 | -21846 | 0 | 3413 | 21845 |
| 73 | -21846 | 0 | 5461 | 21845 |
| 73 | -21846 | 0 | 7509 | 21845 |
| 73 | -21846 | 0 | 9557 | 21845 |
| 73 | -21846 | 0 | 11605 | -21846 |
| 73 | -21846 | 0 | 13653 | 21845 |
| 73 | -21846 | 0 | 15701 | 21845 |
| 73+ | 21845 | 1 | 11605 | -21846 |
| 74 | 21845 | 1 | 11605 | 21845 |
| 74+ | -21846 | 1 | 13653 | 21845 |
| 75 | -21846 | 1 | 13653 | -21846 |
| 75+ | -21846 | 0 | 1365 | 21845 |
| 76 | -21846 | 0 | 1365 | 21845 |
| 76 | -21846 | 0 | 3413 | 21845 |
| 76 | -21846 | 0 | 5461 | 21845 |
| 76 | -21846 | 0 | 7509 | 21845 |
| 76 | -21846 | 0 | 9557 | 21845 |
| 76 | -21846 | 0 | 11605 | 21845 |
| 76 | -21846 | 0 | 13653 | -21846 |
| 76 | -21846 | 0 | 15701 | 21845 |
| 76+ | 21845 | 1 | 13653 | -21846 |
| 77 | 21845 | 1 | 13653 | 21845 |
| 77+ | -21846 | 1 | 15701 | 21845 |
| 78 | -21846 | 1 | 15701 | -21846 |
| 78+ | -21846 | 0 | 1365 | 21845 |
| 79 | -21846 | 0 | 1365 | 21845 |
| 79 | -21846 | 0 | 3413 | 21845 |
| 79 | -21846 | 0 | 5461 | 21845 |
| 79 | -21846 | 0 | 7509 | 21845 |
| 79 | -21846 | 0 | 9557 | 21845 |
| 79 | -21846 | 0 | 11605 | 21845 |
| 79 | -21846 | 0 | 13653 | 21845 |
| 79 | -21846 | 0 | 15701 | -21846 |
| 79+ | 21845 | 1 | 15701 | -21846 |
| 80 | 21845 | 1 | 15701 | 21845 |
| 80+ | 21845 | 0 | 1365 | 21845 |
| 81 | 21845 | 0 | 1365 | 21845 |
| 81 | 21845 | 0 | 3413 | 21845 |
| 81 | 21845 | 0 | 5461 | 21845 |
| 81 | 21845 | 0 | 7509 | 21845 |
| 81 | 21845 | 0 | 9557 | 21845 |
| 81 | 21845 | 0 | 11605 | 21845 |
| 81 | 21845 | 0 | 13653 | 21845 |
| 81 | 21845 | 0 | 15701 | 21845 |

19
nand2tetris-suite/projects/03/b/RAM16K.hdl Normal file
View File

@ -0,0 +1,19 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/b/RAM16K.hdl
/**
* Memory of 16K registers, each 16 bit-wide. Out holds the value
* stored at the memory location specified by address. If load==1, then
* the in value is loaded into the memory location specified by address
* (the loaded value will be emitted to out from the next time step onward).
*/
CHIP RAM16K {
IN in[16], load, address[14];
OUT out[16];
PARTS:
// Put your code here:
}

1026
nand2tetris-suite/projects/03/b/RAM16K.tst Normal file
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320
nand2tetris-suite/projects/03/b/RAM4K.cmp Normal file
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| time | in |load |address | out |
| 0+ | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 0 |
| 1+ | 0 | 1 | 0 | 0 |
| 2 | 0 | 1 | 0 | 0 |
| 2+ | 1111 | 0 | 0 | 0 |
| 3 | 1111 | 0 | 0 | 0 |
| 3+ | 1111 | 1 | 1111 | 0 |
| 4 | 1111 | 1 | 1111 | 1111 |
| 4+ | 1111 | 0 | 0 | 0 |
| 5 | 1111 | 0 | 0 | 0 |
| 5+ | 3513 | 0 | 3513 | 0 |
| 6 | 3513 | 0 | 3513 | 0 |
| 6+ | 3513 | 1 | 3513 | 0 |
| 7 | 3513 | 1 | 3513 | 3513 |
| 7+ | 3513 | 0 | 3513 | 3513 |
| 8 | 3513 | 0 | 3513 | 3513 |
| 8 | 3513 | 0 | 1111 | 1111 |
| 8+ | 4095 | 0 | 1111 | 1111 |
| 9 | 4095 | 0 | 1111 | 1111 |
| 9+ | 4095 | 1 | 4095 | 0 |
| 10 | 4095 | 1 | 4095 | 4095 |
| 10+ | 4095 | 0 | 4095 | 4095 |
| 11 | 4095 | 0 | 4095 | 4095 |
| 11 | 4095 | 0 | 3513 | 3513 |
| 11 | 4095 | 0 | 4095 | 4095 |
| 11+ | 4095 | 0 | 2728 | 0 |
| 12 | 4095 | 0 | 2728 | 0 |
| 12 | 4095 | 0 | 2729 | 0 |
| 12 | 4095 | 0 | 2730 | 0 |
| 12 | 4095 | 0 | 2731 | 0 |
| 12 | 4095 | 0 | 2732 | 0 |
| 12 | 4095 | 0 | 2733 | 0 |
| 12 | 4095 | 0 | 2734 | 0 |
| 12 | 4095 | 0 | 2735 | 0 |
| 12+ | 21845 | 1 | 2728 | 0 |
| 13 | 21845 | 1 | 2728 | 21845 |
| 13+ | 21845 | 1 | 2729 | 0 |
| 14 | 21845 | 1 | 2729 | 21845 |
| 14+ | 21845 | 1 | 2730 | 0 |
| 15 | 21845 | 1 | 2730 | 21845 |
| 15+ | 21845 | 1 | 2731 | 0 |
| 16 | 21845 | 1 | 2731 | 21845 |
| 16+ | 21845 | 1 | 2732 | 0 |
| 17 | 21845 | 1 | 2732 | 21845 |
| 17+ | 21845 | 1 | 2733 | 0 |
| 18 | 21845 | 1 | 2733 | 21845 |
| 18+ | 21845 | 1 | 2734 | 0 |
| 19 | 21845 | 1 | 2734 | 21845 |
| 19+ | 21845 | 1 | 2735 | 0 |
| 20 | 21845 | 1 | 2735 | 21845 |
| 20+ | 21845 | 0 | 2728 | 21845 |
| 21 | 21845 | 0 | 2728 | 21845 |
| 21 | 21845 | 0 | 2729 | 21845 |
| 21 | 21845 | 0 | 2730 | 21845 |
| 21 | 21845 | 0 | 2731 | 21845 |
| 21 | 21845 | 0 | 2732 | 21845 |
| 21 | 21845 | 0 | 2733 | 21845 |
| 21 | 21845 | 0 | 2734 | 21845 |
| 21 | 21845 | 0 | 2735 | 21845 |
| 21+ | -21846 | 1 | 2728 | 21845 |
| 22 | -21846 | 1 | 2728 | -21846 |
| 22+ | -21846 | 0 | 2728 | -21846 |
| 23 | -21846 | 0 | 2728 | -21846 |
| 23 | -21846 | 0 | 2729 | 21845 |
| 23 | -21846 | 0 | 2730 | 21845 |
| 23 | -21846 | 0 | 2731 | 21845 |
| 23 | -21846 | 0 | 2732 | 21845 |
| 23 | -21846 | 0 | 2733 | 21845 |
| 23 | -21846 | 0 | 2734 | 21845 |
| 23 | -21846 | 0 | 2735 | 21845 |
| 23+ | 21845 | 1 | 2728 | -21846 |
| 24 | 21845 | 1 | 2728 | 21845 |
| 24+ | -21846 | 1 | 2729 | 21845 |
| 25 | -21846 | 1 | 2729 | -21846 |
| 25+ | -21846 | 0 | 2728 | 21845 |
| 26 | -21846 | 0 | 2728 | 21845 |
| 26 | -21846 | 0 | 2729 | -21846 |
| 26 | -21846 | 0 | 2730 | 21845 |
| 26 | -21846 | 0 | 2731 | 21845 |
| 26 | -21846 | 0 | 2732 | 21845 |
| 26 | -21846 | 0 | 2733 | 21845 |
| 26 | -21846 | 0 | 2734 | 21845 |
| 26 | -21846 | 0 | 2735 | 21845 |
| 26+ | 21845 | 1 | 2729 | -21846 |
| 27 | 21845 | 1 | 2729 | 21845 |
| 27+ | -21846 | 1 | 2730 | 21845 |
| 28 | -21846 | 1 | 2730 | -21846 |
| 28+ | -21846 | 0 | 2728 | 21845 |
| 29 | -21846 | 0 | 2728 | 21845 |
| 29 | -21846 | 0 | 2729 | 21845 |
| 29 | -21846 | 0 | 2730 | -21846 |
| 29 | -21846 | 0 | 2731 | 21845 |
| 29 | -21846 | 0 | 2732 | 21845 |
| 29 | -21846 | 0 | 2733 | 21845 |
| 29 | -21846 | 0 | 2734 | 21845 |
| 29 | -21846 | 0 | 2735 | 21845 |
| 29+ | 21845 | 1 | 2730 | -21846 |
| 30 | 21845 | 1 | 2730 | 21845 |
| 30+ | -21846 | 1 | 2731 | 21845 |
| 31 | -21846 | 1 | 2731 | -21846 |
| 31+ | -21846 | 0 | 2728 | 21845 |
| 32 | -21846 | 0 | 2728 | 21845 |
| 32 | -21846 | 0 | 2729 | 21845 |
| 32 | -21846 | 0 | 2730 | 21845 |
| 32 | -21846 | 0 | 2731 | -21846 |
| 32 | -21846 | 0 | 2732 | 21845 |
| 32 | -21846 | 0 | 2733 | 21845 |
| 32 | -21846 | 0 | 2734 | 21845 |
| 32 | -21846 | 0 | 2735 | 21845 |
| 32+ | 21845 | 1 | 2731 | -21846 |
| 33 | 21845 | 1 | 2731 | 21845 |
| 33+ | -21846 | 1 | 2732 | 21845 |
| 34 | -21846 | 1 | 2732 | -21846 |
| 34+ | -21846 | 0 | 2728 | 21845 |
| 35 | -21846 | 0 | 2728 | 21845 |
| 35 | -21846 | 0 | 2729 | 21845 |
| 35 | -21846 | 0 | 2730 | 21845 |
| 35 | -21846 | 0 | 2731 | 21845 |
| 35 | -21846 | 0 | 2732 | -21846 |
| 35 | -21846 | 0 | 2733 | 21845 |
| 35 | -21846 | 0 | 2734 | 21845 |
| 35 | -21846 | 0 | 2735 | 21845 |
| 35+ | 21845 | 1 | 2732 | -21846 |
| 36 | 21845 | 1 | 2732 | 21845 |
| 36+ | -21846 | 1 | 2733 | 21845 |
| 37 | -21846 | 1 | 2733 | -21846 |
| 37+ | -21846 | 0 | 2728 | 21845 |
| 38 | -21846 | 0 | 2728 | 21845 |
| 38 | -21846 | 0 | 2729 | 21845 |
| 38 | -21846 | 0 | 2730 | 21845 |
| 38 | -21846 | 0 | 2731 | 21845 |
| 38 | -21846 | 0 | 2732 | 21845 |
| 38 | -21846 | 0 | 2733 | -21846 |
| 38 | -21846 | 0 | 2734 | 21845 |
| 38 | -21846 | 0 | 2735 | 21845 |
| 38+ | 21845 | 1 | 2733 | -21846 |
| 39 | 21845 | 1 | 2733 | 21845 |
| 39+ | -21846 | 1 | 2734 | 21845 |
| 40 | -21846 | 1 | 2734 | -21846 |
| 40+ | -21846 | 0 | 2728 | 21845 |
| 41 | -21846 | 0 | 2728 | 21845 |
| 41 | -21846 | 0 | 2729 | 21845 |
| 41 | -21846 | 0 | 2730 | 21845 |
| 41 | -21846 | 0 | 2731 | 21845 |
| 41 | -21846 | 0 | 2732 | 21845 |
| 41 | -21846 | 0 | 2733 | 21845 |
| 41 | -21846 | 0 | 2734 | -21846 |
| 41 | -21846 | 0 | 2735 | 21845 |
| 41+ | 21845 | 1 | 2734 | -21846 |
| 42 | 21845 | 1 | 2734 | 21845 |
| 42+ | -21846 | 1 | 2735 | 21845 |
| 43 | -21846 | 1 | 2735 | -21846 |
| 43+ | -21846 | 0 | 2728 | 21845 |
| 44 | -21846 | 0 | 2728 | 21845 |
| 44 | -21846 | 0 | 2729 | 21845 |
| 44 | -21846 | 0 | 2730 | 21845 |
| 44 | -21846 | 0 | 2731 | 21845 |
| 44 | -21846 | 0 | 2732 | 21845 |
| 44 | -21846 | 0 | 2733 | 21845 |
| 44 | -21846 | 0 | 2734 | 21845 |
| 44 | -21846 | 0 | 2735 | -21846 |
| 44+ | 21845 | 1 | 2735 | -21846 |
| 45 | 21845 | 1 | 2735 | 21845 |
| 45+ | 21845 | 0 | 2728 | 21845 |
| 46 | 21845 | 0 | 2728 | 21845 |
| 46 | 21845 | 0 | 2729 | 21845 |
| 46 | 21845 | 0 | 2730 | 21845 |
| 46 | 21845 | 0 | 2731 | 21845 |
| 46 | 21845 | 0 | 2732 | 21845 |
| 46 | 21845 | 0 | 2733 | 21845 |
| 46 | 21845 | 0 | 2734 | 21845 |
| 46 | 21845 | 0 | 2735 | 21845 |
| 46+ | 21845 | 0 | 341 | 0 |
| 47 | 21845 | 0 | 341 | 0 |
| 47 | 21845 | 0 | 853 | 0 |
| 47 | 21845 | 0 | 1365 | 0 |
| 47 | 21845 | 0 | 1877 | 0 |
| 47 | 21845 | 0 | 2389 | 0 |
| 47 | 21845 | 0 | 2901 | 0 |
| 47 | 21845 | 0 | 3413 | 0 |
| 47 | 21845 | 0 | 3925 | 0 |
| 47+ | 21845 | 1 | 341 | 0 |
| 48 | 21845 | 1 | 341 | 21845 |
| 48+ | 21845 | 1 | 853 | 0 |
| 49 | 21845 | 1 | 853 | 21845 |
| 49+ | 21845 | 1 | 1365 | 0 |
| 50 | 21845 | 1 | 1365 | 21845 |
| 50+ | 21845 | 1 | 1877 | 0 |
| 51 | 21845 | 1 | 1877 | 21845 |
| 51+ | 21845 | 1 | 2389 | 0 |
| 52 | 21845 | 1 | 2389 | 21845 |
| 52+ | 21845 | 1 | 2901 | 0 |
| 53 | 21845 | 1 | 2901 | 21845 |
| 53+ | 21845 | 1 | 3413 | 0 |
| 54 | 21845 | 1 | 3413 | 21845 |
| 54+ | 21845 | 1 | 3925 | 0 |
| 55 | 21845 | 1 | 3925 | 21845 |
| 55+ | 21845 | 0 | 341 | 21845 |
| 56 | 21845 | 0 | 341 | 21845 |
| 56 | 21845 | 0 | 853 | 21845 |
| 56 | 21845 | 0 | 1365 | 21845 |
| 56 | 21845 | 0 | 1877 | 21845 |
| 56 | 21845 | 0 | 2389 | 21845 |
| 56 | 21845 | 0 | 2901 | 21845 |
| 56 | 21845 | 0 | 3413 | 21845 |
| 56 | 21845 | 0 | 3925 | 21845 |
| 56+ | -21846 | 1 | 341 | 21845 |
| 57 | -21846 | 1 | 341 | -21846 |
| 57+ | -21846 | 0 | 341 | -21846 |
| 58 | -21846 | 0 | 341 | -21846 |
| 58 | -21846 | 0 | 853 | 21845 |
| 58 | -21846 | 0 | 1365 | 21845 |
| 58 | -21846 | 0 | 1877 | 21845 |
| 58 | -21846 | 0 | 2389 | 21845 |
| 58 | -21846 | 0 | 2901 | 21845 |
| 58 | -21846 | 0 | 3413 | 21845 |
| 58 | -21846 | 0 | 3925 | 21845 |
| 58+ | 21845 | 1 | 341 | -21846 |
| 59 | 21845 | 1 | 341 | 21845 |
| 59+ | -21846 | 1 | 853 | 21845 |
| 60 | -21846 | 1 | 853 | -21846 |
| 60+ | -21846 | 0 | 341 | 21845 |
| 61 | -21846 | 0 | 341 | 21845 |
| 61 | -21846 | 0 | 853 | -21846 |
| 61 | -21846 | 0 | 1365 | 21845 |
| 61 | -21846 | 0 | 1877 | 21845 |
| 61 | -21846 | 0 | 2389 | 21845 |
| 61 | -21846 | 0 | 2901 | 21845 |
| 61 | -21846 | 0 | 3413 | 21845 |
| 61 | -21846 | 0 | 3925 | 21845 |
| 61+ | 21845 | 1 | 853 | -21846 |
| 62 | 21845 | 1 | 853 | 21845 |
| 62+ | -21846 | 1 | 1365 | 21845 |
| 63 | -21846 | 1 | 1365 | -21846 |
| 63+ | -21846 | 0 | 341 | 21845 |
| 64 | -21846 | 0 | 341 | 21845 |
| 64 | -21846 | 0 | 853 | 21845 |
| 64 | -21846 | 0 | 1365 | -21846 |
| 64 | -21846 | 0 | 1877 | 21845 |
| 64 | -21846 | 0 | 2389 | 21845 |
| 64 | -21846 | 0 | 2901 | 21845 |
| 64 | -21846 | 0 | 3413 | 21845 |
| 64 | -21846 | 0 | 3925 | 21845 |
| 64+ | 21845 | 1 | 1365 | -21846 |
| 65 | 21845 | 1 | 1365 | 21845 |
| 65+ | -21846 | 1 | 1877 | 21845 |
| 66 | -21846 | 1 | 1877 | -21846 |
| 66+ | -21846 | 0 | 341 | 21845 |
| 67 | -21846 | 0 | 341 | 21845 |
| 67 | -21846 | 0 | 853 | 21845 |
| 67 | -21846 | 0 | 1365 | 21845 |
| 67 | -21846 | 0 | 1877 | -21846 |
| 67 | -21846 | 0 | 2389 | 21845 |
| 67 | -21846 | 0 | 2901 | 21845 |
| 67 | -21846 | 0 | 3413 | 21845 |
| 67 | -21846 | 0 | 3925 | 21845 |
| 67+ | 21845 | 1 | 1877 | -21846 |
| 68 | 21845 | 1 | 1877 | 21845 |
| 68+ | -21846 | 1 | 2389 | 21845 |
| 69 | -21846 | 1 | 2389 | -21846 |
| 69+ | -21846 | 0 | 341 | 21845 |
| 70 | -21846 | 0 | 341 | 21845 |
| 70 | -21846 | 0 | 853 | 21845 |
| 70 | -21846 | 0 | 1365 | 21845 |
| 70 | -21846 | 0 | 1877 | 21845 |
| 70 | -21846 | 0 | 2389 | -21846 |
| 70 | -21846 | 0 | 2901 | 21845 |
| 70 | -21846 | 0 | 3413 | 21845 |
| 70 | -21846 | 0 | 3925 | 21845 |
| 70+ | 21845 | 1 | 2389 | -21846 |
| 71 | 21845 | 1 | 2389 | 21845 |
| 71+ | -21846 | 1 | 2901 | 21845 |
| 72 | -21846 | 1 | 2901 | -21846 |
| 72+ | -21846 | 0 | 341 | 21845 |
| 73 | -21846 | 0 | 341 | 21845 |
| 73 | -21846 | 0 | 853 | 21845 |
| 73 | -21846 | 0 | 1365 | 21845 |
| 73 | -21846 | 0 | 1877 | 21845 |
| 73 | -21846 | 0 | 2389 | 21845 |
| 73 | -21846 | 0 | 2901 | -21846 |
| 73 | -21846 | 0 | 3413 | 21845 |
| 73 | -21846 | 0 | 3925 | 21845 |
| 73+ | 21845 | 1 | 2901 | -21846 |
| 74 | 21845 | 1 | 2901 | 21845 |
| 74+ | -21846 | 1 | 3413 | 21845 |
| 75 | -21846 | 1 | 3413 | -21846 |
| 75+ | -21846 | 0 | 341 | 21845 |
| 76 | -21846 | 0 | 341 | 21845 |
| 76 | -21846 | 0 | 853 | 21845 |
| 76 | -21846 | 0 | 1365 | 21845 |
| 76 | -21846 | 0 | 1877 | 21845 |
| 76 | -21846 | 0 | 2389 | 21845 |
| 76 | -21846 | 0 | 2901 | 21845 |
| 76 | -21846 | 0 | 3413 | -21846 |
| 76 | -21846 | 0 | 3925 | 21845 |
| 76+ | 21845 | 1 | 3413 | -21846 |
| 77 | 21845 | 1 | 3413 | 21845 |
| 77+ | -21846 | 1 | 3925 | 21845 |
| 78 | -21846 | 1 | 3925 | -21846 |
| 78+ | -21846 | 0 | 341 | 21845 |
| 79 | -21846 | 0 | 341 | 21845 |
| 79 | -21846 | 0 | 853 | 21845 |
| 79 | -21846 | 0 | 1365 | 21845 |
| 79 | -21846 | 0 | 1877 | 21845 |
| 79 | -21846 | 0 | 2389 | 21845 |
| 79 | -21846 | 0 | 2901 | 21845 |
| 79 | -21846 | 0 | 3413 | 21845 |
| 79 | -21846 | 0 | 3925 | -21846 |
| 79+ | 21845 | 1 | 3925 | -21846 |
| 80 | 21845 | 1 | 3925 | 21845 |
| 80+ | 21845 | 0 | 341 | 21845 |
| 81 | 21845 | 0 | 341 | 21845 |
| 81 | 21845 | 0 | 853 | 21845 |
| 81 | 21845 | 0 | 1365 | 21845 |
| 81 | 21845 | 0 | 1877 | 21845 |
| 81 | 21845 | 0 | 2389 | 21845 |
| 81 | 21845 | 0 | 2901 | 21845 |
| 81 | 21845 | 0 | 3413 | 21845 |
| 81 | 21845 | 0 | 3925 | 21845 |

19
nand2tetris-suite/projects/03/b/RAM4K.hdl Normal file
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@ -0,0 +1,19 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/b/RAM4K.hdl
/**
* Memory of 4K registers, each 16 bit-wide. Out holds the value
* stored at the memory location specified by address. If load==1, then
* the in value is loaded into the memory location specified by address
* (the loaded value will be emitted to out from the next time step onward).
*/
CHIP RAM4K {
IN in[16], load, address[12];
OUT out[16];
PARTS:
// Put your code here:
}

1026
nand2tetris-suite/projects/03/b/RAM4K.tst Normal file
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320
nand2tetris-suite/projects/03/b/RAM512.cmp Normal file
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| time | in |load |address| out |
| 0+ | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 0 |
| 1+ | 0 | 1 | 0 | 0 |
| 2 | 0 | 1 | 0 | 0 |
| 2+ | 13099 | 0 | 0 | 0 |
| 3 | 13099 | 0 | 0 | 0 |
| 3+ | 13099 | 1 | 130 | 0 |
| 4 | 13099 | 1 | 130 | 13099 |
| 4+ | 13099 | 0 | 0 | 0 |
| 5 | 13099 | 0 | 0 | 0 |
| 5+ | 4729 | 0 | 472 | 0 |
| 6 | 4729 | 0 | 472 | 0 |
| 6+ | 4729 | 1 | 472 | 0 |
| 7 | 4729 | 1 | 472 | 4729 |
| 7+ | 4729 | 0 | 472 | 4729 |
| 8 | 4729 | 0 | 472 | 4729 |
| 8 | 4729 | 0 | 130 | 13099 |
| 8+ | 5119 | 0 | 130 | 13099 |
| 9 | 5119 | 0 | 130 | 13099 |
| 9+ | 5119 | 1 | 511 | 0 |
| 10 | 5119 | 1 | 511 | 5119 |
| 10+ | 5119 | 0 | 511 | 5119 |
| 11 | 5119 | 0 | 511 | 5119 |
| 11 | 5119 | 0 | 472 | 4729 |
| 11 | 5119 | 0 | 511 | 5119 |
| 11+ | 5119 | 0 | 168 | 0 |
| 12 | 5119 | 0 | 168 | 0 |
| 12 | 5119 | 0 | 169 | 0 |
| 12 | 5119 | 0 | 170 | 0 |
| 12 | 5119 | 0 | 171 | 0 |
| 12 | 5119 | 0 | 172 | 0 |
| 12 | 5119 | 0 | 173 | 0 |
| 12 | 5119 | 0 | 174 | 0 |
| 12 | 5119 | 0 | 175 | 0 |
| 12+ | 21845 | 1 | 168 | 0 |
| 13 | 21845 | 1 | 168 | 21845 |
| 13+ | 21845 | 1 | 169 | 0 |
| 14 | 21845 | 1 | 169 | 21845 |
| 14+ | 21845 | 1 | 170 | 0 |
| 15 | 21845 | 1 | 170 | 21845 |
| 15+ | 21845 | 1 | 171 | 0 |
| 16 | 21845 | 1 | 171 | 21845 |
| 16+ | 21845 | 1 | 172 | 0 |
| 17 | 21845 | 1 | 172 | 21845 |
| 17+ | 21845 | 1 | 173 | 0 |
| 18 | 21845 | 1 | 173 | 21845 |
| 18+ | 21845 | 1 | 174 | 0 |
| 19 | 21845 | 1 | 174 | 21845 |
| 19+ | 21845 | 1 | 175 | 0 |
| 20 | 21845 | 1 | 175 | 21845 |
| 20+ | 21845 | 0 | 168 | 21845 |
| 21 | 21845 | 0 | 168 | 21845 |
| 21 | 21845 | 0 | 169 | 21845 |
| 21 | 21845 | 0 | 170 | 21845 |
| 21 | 21845 | 0 | 171 | 21845 |
| 21 | 21845 | 0 | 172 | 21845 |
| 21 | 21845 | 0 | 173 | 21845 |
| 21 | 21845 | 0 | 174 | 21845 |
| 21 | 21845 | 0 | 175 | 21845 |
| 21+ | -21846 | 1 | 168 | 21845 |
| 22 | -21846 | 1 | 168 | -21846 |
| 22+ | -21846 | 0 | 168 | -21846 |
| 23 | -21846 | 0 | 168 | -21846 |
| 23 | -21846 | 0 | 169 | 21845 |
| 23 | -21846 | 0 | 170 | 21845 |
| 23 | -21846 | 0 | 171 | 21845 |
| 23 | -21846 | 0 | 172 | 21845 |
| 23 | -21846 | 0 | 173 | 21845 |
| 23 | -21846 | 0 | 174 | 21845 |
| 23 | -21846 | 0 | 175 | 21845 |
| 23+ | 21845 | 1 | 168 | -21846 |
| 24 | 21845 | 1 | 168 | 21845 |
| 24+ | -21846 | 1 | 169 | 21845 |
| 25 | -21846 | 1 | 169 | -21846 |
| 25+ | -21846 | 0 | 168 | 21845 |
| 26 | -21846 | 0 | 168 | 21845 |
| 26 | -21846 | 0 | 169 | -21846 |
| 26 | -21846 | 0 | 170 | 21845 |
| 26 | -21846 | 0 | 171 | 21845 |
| 26 | -21846 | 0 | 172 | 21845 |
| 26 | -21846 | 0 | 173 | 21845 |
| 26 | -21846 | 0 | 174 | 21845 |
| 26 | -21846 | 0 | 175 | 21845 |
| 26+ | 21845 | 1 | 169 | -21846 |
| 27 | 21845 | 1 | 169 | 21845 |
| 27+ | -21846 | 1 | 170 | 21845 |
| 28 | -21846 | 1 | 170 | -21846 |
| 28+ | -21846 | 0 | 168 | 21845 |
| 29 | -21846 | 0 | 168 | 21845 |
| 29 | -21846 | 0 | 169 | 21845 |
| 29 | -21846 | 0 | 170 | -21846 |
| 29 | -21846 | 0 | 171 | 21845 |
| 29 | -21846 | 0 | 172 | 21845 |
| 29 | -21846 | 0 | 173 | 21845 |
| 29 | -21846 | 0 | 174 | 21845 |
| 29 | -21846 | 0 | 175 | 21845 |
| 29+ | 21845 | 1 | 170 | -21846 |
| 30 | 21845 | 1 | 170 | 21845 |
| 30+ | -21846 | 1 | 171 | 21845 |
| 31 | -21846 | 1 | 171 | -21846 |
| 31+ | -21846 | 0 | 168 | 21845 |
| 32 | -21846 | 0 | 168 | 21845 |
| 32 | -21846 | 0 | 169 | 21845 |
| 32 | -21846 | 0 | 170 | 21845 |
| 32 | -21846 | 0 | 171 | -21846 |
| 32 | -21846 | 0 | 172 | 21845 |
| 32 | -21846 | 0 | 173 | 21845 |
| 32 | -21846 | 0 | 174 | 21845 |
| 32 | -21846 | 0 | 175 | 21845 |
| 32+ | 21845 | 1 | 171 | -21846 |
| 33 | 21845 | 1 | 171 | 21845 |
| 33+ | -21846 | 1 | 172 | 21845 |
| 34 | -21846 | 1 | 172 | -21846 |
| 34+ | -21846 | 0 | 168 | 21845 |
| 35 | -21846 | 0 | 168 | 21845 |
| 35 | -21846 | 0 | 169 | 21845 |
| 35 | -21846 | 0 | 170 | 21845 |
| 35 | -21846 | 0 | 171 | 21845 |
| 35 | -21846 | 0 | 172 | -21846 |
| 35 | -21846 | 0 | 173 | 21845 |
| 35 | -21846 | 0 | 174 | 21845 |
| 35 | -21846 | 0 | 175 | 21845 |
| 35+ | 21845 | 1 | 172 | -21846 |
| 36 | 21845 | 1 | 172 | 21845 |
| 36+ | -21846 | 1 | 173 | 21845 |
| 37 | -21846 | 1 | 173 | -21846 |
| 37+ | -21846 | 0 | 168 | 21845 |
| 38 | -21846 | 0 | 168 | 21845 |
| 38 | -21846 | 0 | 169 | 21845 |
| 38 | -21846 | 0 | 170 | 21845 |
| 38 | -21846 | 0 | 171 | 21845 |
| 38 | -21846 | 0 | 172 | 21845 |
| 38 | -21846 | 0 | 173 | -21846 |
| 38 | -21846 | 0 | 174 | 21845 |
| 38 | -21846 | 0 | 175 | 21845 |
| 38+ | 21845 | 1 | 173 | -21846 |
| 39 | 21845 | 1 | 173 | 21845 |
| 39+ | -21846 | 1 | 174 | 21845 |
| 40 | -21846 | 1 | 174 | -21846 |
| 40+ | -21846 | 0 | 168 | 21845 |
| 41 | -21846 | 0 | 168 | 21845 |
| 41 | -21846 | 0 | 169 | 21845 |
| 41 | -21846 | 0 | 170 | 21845 |
| 41 | -21846 | 0 | 171 | 21845 |
| 41 | -21846 | 0 | 172 | 21845 |
| 41 | -21846 | 0 | 173 | 21845 |
| 41 | -21846 | 0 | 174 | -21846 |
| 41 | -21846 | 0 | 175 | 21845 |
| 41+ | 21845 | 1 | 174 | -21846 |
| 42 | 21845 | 1 | 174 | 21845 |
| 42+ | -21846 | 1 | 175 | 21845 |
| 43 | -21846 | 1 | 175 | -21846 |
| 43+ | -21846 | 0 | 168 | 21845 |
| 44 | -21846 | 0 | 168 | 21845 |
| 44 | -21846 | 0 | 169 | 21845 |
| 44 | -21846 | 0 | 170 | 21845 |
| 44 | -21846 | 0 | 171 | 21845 |
| 44 | -21846 | 0 | 172 | 21845 |
| 44 | -21846 | 0 | 173 | 21845 |
| 44 | -21846 | 0 | 174 | 21845 |
| 44 | -21846 | 0 | 175 | -21846 |
| 44+ | 21845 | 1 | 175 | -21846 |
| 45 | 21845 | 1 | 175 | 21845 |
| 45+ | 21845 | 0 | 168 | 21845 |
| 46 | 21845 | 0 | 168 | 21845 |
| 46 | 21845 | 0 | 169 | 21845 |
| 46 | 21845 | 0 | 170 | 21845 |
| 46 | 21845 | 0 | 171 | 21845 |
| 46 | 21845 | 0 | 172 | 21845 |
| 46 | 21845 | 0 | 173 | 21845 |
| 46 | 21845 | 0 | 174 | 21845 |
| 46 | 21845 | 0 | 175 | 21845 |
| 46+ | 21845 | 0 | 42 | 0 |
| 47 | 21845 | 0 | 42 | 0 |
| 47 | 21845 | 0 | 106 | 0 |
| 47 | 21845 | 0 | 170 | 21845 |
| 47 | 21845 | 0 | 234 | 0 |
| 47 | 21845 | 0 | 298 | 0 |
| 47 | 21845 | 0 | 362 | 0 |
| 47 | 21845 | 0 | 426 | 0 |
| 47 | 21845 | 0 | 490 | 0 |
| 47+ | 21845 | 1 | 42 | 0 |
| 48 | 21845 | 1 | 42 | 21845 |
| 48+ | 21845 | 1 | 106 | 0 |
| 49 | 21845 | 1 | 106 | 21845 |
| 49+ | 21845 | 1 | 170 | 21845 |
| 50 | 21845 | 1 | 170 | 21845 |
| 50+ | 21845 | 1 | 234 | 0 |
| 51 | 21845 | 1 | 234 | 21845 |
| 51+ | 21845 | 1 | 298 | 0 |
| 52 | 21845 | 1 | 298 | 21845 |
| 52+ | 21845 | 1 | 362 | 0 |
| 53 | 21845 | 1 | 362 | 21845 |
| 53+ | 21845 | 1 | 426 | 0 |
| 54 | 21845 | 1 | 426 | 21845 |
| 54+ | 21845 | 1 | 490 | 0 |
| 55 | 21845 | 1 | 490 | 21845 |
| 55+ | 21845 | 0 | 42 | 21845 |
| 56 | 21845 | 0 | 42 | 21845 |
| 56 | 21845 | 0 | 106 | 21845 |
| 56 | 21845 | 0 | 170 | 21845 |
| 56 | 21845 | 0 | 234 | 21845 |
| 56 | 21845 | 0 | 298 | 21845 |
| 56 | 21845 | 0 | 362 | 21845 |
| 56 | 21845 | 0 | 426 | 21845 |
| 56 | 21845 | 0 | 490 | 21845 |
| 56+ | -21846 | 1 | 42 | 21845 |
| 57 | -21846 | 1 | 42 | -21846 |
| 57+ | -21846 | 0 | 42 | -21846 |
| 58 | -21846 | 0 | 42 | -21846 |
| 58 | -21846 | 0 | 106 | 21845 |
| 58 | -21846 | 0 | 170 | 21845 |
| 58 | -21846 | 0 | 234 | 21845 |
| 58 | -21846 | 0 | 298 | 21845 |
| 58 | -21846 | 0 | 362 | 21845 |
| 58 | -21846 | 0 | 426 | 21845 |
| 58 | -21846 | 0 | 490 | 21845 |
| 58+ | 21845 | 1 | 42 | -21846 |
| 59 | 21845 | 1 | 42 | 21845 |
| 59+ | -21846 | 1 | 106 | 21845 |
| 60 | -21846 | 1 | 106 | -21846 |
| 60+ | -21846 | 0 | 42 | 21845 |
| 61 | -21846 | 0 | 42 | 21845 |
| 61 | -21846 | 0 | 106 | -21846 |
| 61 | -21846 | 0 | 170 | 21845 |
| 61 | -21846 | 0 | 234 | 21845 |
| 61 | -21846 | 0 | 298 | 21845 |
| 61 | -21846 | 0 | 362 | 21845 |
| 61 | -21846 | 0 | 426 | 21845 |
| 61 | -21846 | 0 | 490 | 21845 |
| 61+ | 21845 | 1 | 106 | -21846 |
| 62 | 21845 | 1 | 106 | 21845 |
| 62+ | -21846 | 1 | 170 | 21845 |
| 63 | -21846 | 1 | 170 | -21846 |
| 63+ | -21846 | 0 | 42 | 21845 |
| 64 | -21846 | 0 | 42 | 21845 |
| 64 | -21846 | 0 | 106 | 21845 |
| 64 | -21846 | 0 | 170 | -21846 |
| 64 | -21846 | 0 | 234 | 21845 |
| 64 | -21846 | 0 | 298 | 21845 |
| 64 | -21846 | 0 | 362 | 21845 |
| 64 | -21846 | 0 | 426 | 21845 |
| 64 | -21846 | 0 | 490 | 21845 |
| 64+ | 21845 | 1 | 170 | -21846 |
| 65 | 21845 | 1 | 170 | 21845 |
| 65+ | -21846 | 1 | 234 | 21845 |
| 66 | -21846 | 1 | 234 | -21846 |
| 66+ | -21846 | 0 | 42 | 21845 |
| 67 | -21846 | 0 | 42 | 21845 |
| 67 | -21846 | 0 | 106 | 21845 |
| 67 | -21846 | 0 | 170 | 21845 |
| 67 | -21846 | 0 | 234 | -21846 |
| 67 | -21846 | 0 | 298 | 21845 |
| 67 | -21846 | 0 | 362 | 21845 |
| 67 | -21846 | 0 | 426 | 21845 |
| 67 | -21846 | 0 | 490 | 21845 |
| 67+ | 21845 | 1 | 234 | -21846 |
| 68 | 21845 | 1 | 234 | 21845 |
| 68+ | -21846 | 1 | 298 | 21845 |
| 69 | -21846 | 1 | 298 | -21846 |
| 69+ | -21846 | 0 | 42 | 21845 |
| 70 | -21846 | 0 | 42 | 21845 |
| 70 | -21846 | 0 | 106 | 21845 |
| 70 | -21846 | 0 | 170 | 21845 |
| 70 | -21846 | 0 | 234 | 21845 |
| 70 | -21846 | 0 | 298 | -21846 |
| 70 | -21846 | 0 | 362 | 21845 |
| 70 | -21846 | 0 | 426 | 21845 |
| 70 | -21846 | 0 | 490 | 21845 |
| 70+ | 21845 | 1 | 298 | -21846 |
| 71 | 21845 | 1 | 298 | 21845 |
| 71+ | -21846 | 1 | 362 | 21845 |
| 72 | -21846 | 1 | 362 | -21846 |
| 72+ | -21846 | 0 | 42 | 21845 |
| 73 | -21846 | 0 | 42 | 21845 |
| 73 | -21846 | 0 | 106 | 21845 |
| 73 | -21846 | 0 | 170 | 21845 |
| 73 | -21846 | 0 | 234 | 21845 |
| 73 | -21846 | 0 | 298 | 21845 |
| 73 | -21846 | 0 | 362 | -21846 |
| 73 | -21846 | 0 | 426 | 21845 |
| 73 | -21846 | 0 | 490 | 21845 |
| 73+ | 21845 | 1 | 362 | -21846 |
| 74 | 21845 | 1 | 362 | 21845 |
| 74+ | -21846 | 1 | 426 | 21845 |
| 75 | -21846 | 1 | 426 | -21846 |
| 75+ | -21846 | 0 | 42 | 21845 |
| 76 | -21846 | 0 | 42 | 21845 |
| 76 | -21846 | 0 | 106 | 21845 |
| 76 | -21846 | 0 | 170 | 21845 |
| 76 | -21846 | 0 | 234 | 21845 |
| 76 | -21846 | 0 | 298 | 21845 |
| 76 | -21846 | 0 | 362 | 21845 |
| 76 | -21846 | 0 | 426 | -21846 |
| 76 | -21846 | 0 | 490 | 21845 |
| 76+ | 21845 | 1 | 426 | -21846 |
| 77 | 21845 | 1 | 426 | 21845 |
| 77+ | -21846 | 1 | 490 | 21845 |
| 78 | -21846 | 1 | 490 | -21846 |
| 78+ | -21846 | 0 | 42 | 21845 |
| 79 | -21846 | 0 | 42 | 21845 |
| 79 | -21846 | 0 | 106 | 21845 |
| 79 | -21846 | 0 | 170 | 21845 |
| 79 | -21846 | 0 | 234 | 21845 |
| 79 | -21846 | 0 | 298 | 21845 |
| 79 | -21846 | 0 | 362 | 21845 |
| 79 | -21846 | 0 | 426 | 21845 |
| 79 | -21846 | 0 | 490 | -21846 |
| 79+ | 21845 | 1 | 490 | -21846 |
| 80 | 21845 | 1 | 490 | 21845 |
| 80+ | 21845 | 0 | 42 | 21845 |
| 81 | 21845 | 0 | 42 | 21845 |
| 81 | 21845 | 0 | 106 | 21845 |
| 81 | 21845 | 0 | 170 | 21845 |
| 81 | 21845 | 0 | 234 | 21845 |
| 81 | 21845 | 0 | 298 | 21845 |
| 81 | 21845 | 0 | 362 | 21845 |
| 81 | 21845 | 0 | 426 | 21845 |
| 81 | 21845 | 0 | 490 | 21845 |

19
nand2tetris-suite/projects/03/b/RAM512.hdl Normal file
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// This file is part of the materials accompanying the book
// "The Elements of Computing Systems" by Nisan and Schocken,
// MIT Press. Book site: www.idc.ac.il/tecs
// File name: projects/03/b/RAM512.hdl
/**
* Memory of 512 registers, each 16 bit-wide. Out holds the value
* stored at the memory location specified by address. If load==1, then
* the in value is loaded into the memory location specified by address
* (the loaded value will be emitted to out from the next time step onward).
*/
CHIP RAM512 {
IN in[16], load, address[9];
OUT out[16];
PARTS:
// Put your code here:
}

1027
nand2tetris-suite/projects/03/b/RAM512.tst Normal file
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File diff suppressed because it is too large Load Diff

14
nand2tetris-suite/projects/04/fill/Fill.asm Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/04/Fill.asm
// Runs an infinite loop that listens to the keyboard input.
// When a key is pressed (any key), the program blackens the screen,
// i.e. writes "black" in every pixel;
// the screen should remain fully black as long as the key is pressed.
// When no key is pressed, the program clears the screen, i.e. writes
// "white" in every pixel;
// the screen should remain fully clear as long as no key is pressed.
// Put your code here.

11
nand2tetris-suite/projects/04/fill/Fill.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/04/fill/Fill.tst
load Fill.asm;
echo "Make sure that 'No Animation' is selected. Then, select the keyboard, press any key for some time, and inspect the screen.";
repeat {
ticktock;
}

4
nand2tetris-suite/projects/04/fill/FillAutomatic.cmp Normal file
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|RAM[16384]|RAM[17648]|RAM[18349]|RAM[19444]|RAM[20771]|RAM[21031]|RAM[22596]|RAM[23754]|RAM[24575]|
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |

37
nand2tetris-suite/projects/04/fill/FillAutomatic.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/04/fill/FillAutomatic
// This script can be used to test the Fill program automatically,
// rather than interactively. Specifically, the script sets the keyboard
// memory map (RAM[24576]) to 0, 1, and then again to 0. This simulates the
// acts of leaving the keyboard untouched, pressing some key, and then releasing
// the key. After each on of these simulated events, the script outputs the values
// of some selected registers from the screen memory map (RAM[16384]-RAM[24576]).
// This is done in order to test that these registers are set to 000...0 or 111....1,
// as mandated by how the Fill program should react to the keyboard events.
load Fill.asm,
output-file FillAutomatic.out,
compare-to FillAutomatic.cmp,
output-list RAM[16384]%D2.6.2 RAM[17648]%D2.6.2 RAM[18349]%D2.6.2 RAM[19444]%D2.6.2 RAM[20771]%D2.6.2 RAM[21031]%D2.6.2 RAM[22596]%D2.6.2 RAM[23754]%D2.6.2 RAM[24575]%D2.6.2;
set RAM[24576] 0, // the keyboard is untouched
repeat 1000000 {
ticktock;
}
output; // test that the screen is white
set RAM[24576] 1, // a keyboard key is pressed
repeat 1000000 {
ticktock;
}
output; // test that the screen is black
set RAM[24576] 0, // they keyboard in untouched
repeat 1000000 {
ticktock;
}
output; // test that the screen is white

12
nand2tetris-suite/projects/04/mult/Mult.asm Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/04/Mult.asm
// Multiplies R0 and R1 and stores the result in R2.
// (R0, R1, R2 refer to RAM[0], RAM[1], and RAM[2], respectively.)
//
// This program only needs to handle arguments that satisfy
// R0 >= 0, R1 >= 0, and R0*R1 < 32768.
// Put your code here.

7
nand2tetris-suite/projects/04/mult/Mult.cmp Normal file
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@ -0,0 +1,7 @@
| RAM[0] | RAM[1] | RAM[2] |
| 0 | 0 | 0 |
| 1 | 0 | 0 |
| 0 | 2 | 0 |
| 3 | 1 | 3 |
| 2 | 4 | 8 |
| 6 | 7 | 42 |

74
nand2tetris-suite/projects/04/mult/Mult.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/04/mult/Mult.tst
load Mult.asm,
output-file Mult.out,
compare-to Mult.cmp,
output-list RAM[0]%D2.6.2 RAM[1]%D2.6.2 RAM[2]%D2.6.2;
set RAM[0] 0, // Set test arguments
set RAM[1] 0,
set RAM[2] -1; // Test that program initialized product to 0
repeat 20 {
ticktock;
}
set RAM[0] 0, // Restore arguments in case program used them as loop counter
set RAM[1] 0,
output;
set PC 0,
set RAM[0] 1, // Set test arguments
set RAM[1] 0,
set RAM[2] -1; // Ensure that program initialized product to 0
repeat 50 {
ticktock;
}
set RAM[0] 1, // Restore arguments in case program used them as loop counter
set RAM[1] 0,
output;
set PC 0,
set RAM[0] 0, // Set test arguments
set RAM[1] 2,
set RAM[2] -1; // Ensure that program initialized product to 0
repeat 80 {
ticktock;
}
set RAM[0] 0, // Restore arguments in case program used them as loop counter
set RAM[1] 2,
output;
set PC 0,
set RAM[0] 3, // Set test arguments
set RAM[1] 1,
set RAM[2] -1; // Ensure that program initialized product to 0
repeat 120 {
ticktock;
}
set RAM[0] 3, // Restore arguments in case program used them as loop counter
set RAM[1] 1,
output;
set PC 0,
set RAM[0] 2, // Set test arguments
set RAM[1] 4,
set RAM[2] -1; // Ensure that program initialized product to 0
repeat 150 {
ticktock;
}
set RAM[0] 2, // Restore arguments in case program used them as loop counter
set RAM[1] 4,
output;
set PC 0,
set RAM[0] 6, // Set test arguments
set RAM[1] 7,
set RAM[2] -1; // Ensure that program initialized product to 0
repeat 210 {
ticktock;
}
set RAM[0] 6, // Restore arguments in case program used them as loop counter
set RAM[1] 7,
output;

6
nand2tetris-suite/projects/05/Add.hack Normal file
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0000000000000010
1110110000010000
0000000000000011
1110000010010000
0000000000000000
1110001100001000

93
nand2tetris-suite/projects/05/CPU-external.cmp Normal file
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|time| inM | instruction |reset| outM |writeM |addre| pc |
|0+ | 0|0011000000111001| 0 |*******| 0 | 0| 0|
|1 | 0|0011000000111001| 0 |*******| 0 |12345| 1|
|1+ | 0|1110110000010000| 0 |*******| 0 |12345| 1|
|2 | 0|1110110000010000| 0 |*******| 0 |12345| 2|
|2+ | 0|0101101110100000| 0 |*******| 0 |12345| 2|
|3 | 0|0101101110100000| 0 |*******| 0 |23456| 3|
|3+ | 0|1110000111010000| 0 |*******| 0 |23456| 3|
|4 | 0|1110000111010000| 0 |*******| 0 |23456| 4|
|4+ | 0|0000001111101000| 0 |*******| 0 |23456| 4|
|5 | 0|0000001111101000| 0 |*******| 0 | 1000| 5|
|5+ | 0|1110001100001000| 0 | 11111| 1 | 1000| 5|
|6 | 0|1110001100001000| 0 | 11111| 1 | 1000| 6|
|6+ | 0|0000001111101001| 0 |*******| 0 | 1000| 6|
|7 | 0|0000001111101001| 0 |*******| 0 | 1001| 7|
|7+ | 0|1110001110011000| 0 | 11110| 1 | 1001| 7|
|8 | 0|1110001110011000| 0 | 11109| 1 | 1001| 8|
|8+ | 0|0000001111101000| 0 |*******| 0 | 1001| 8|
|9 | 0|0000001111101000| 0 |*******| 0 | 1000| 9|
|9+ | 11111|1111010011010000| 0 |*******| 0 | 1000| 9|
|10 | 11111|1111010011010000| 0 |*******| 0 | 1000| 10|
|10+ | 11111|0000000000001110| 0 |*******| 0 | 1000| 10|
|11 | 11111|0000000000001110| 0 |*******| 0 | 14| 11|
|11+ | 11111|1110001100000100| 0 |*******| 0 | 14| 11|
|12 | 11111|1110001100000100| 0 |*******| 0 | 14| 14|
|12+ | 11111|0000001111100111| 0 |*******| 0 | 14| 14|
|13 | 11111|0000001111100111| 0 |*******| 0 | 999| 15|
|13+ | 11111|1110110111100000| 0 |*******| 0 | 999| 15|
|14 | 11111|1110110111100000| 0 |*******| 0 | 1000| 16|
|14+ | 11111|1110001100001000| 0 | -1| 1 | 1000| 16|
|15 | 11111|1110001100001000| 0 | -1| 1 | 1000| 17|
|15+ | 11111|0000000000010101| 0 |*******| 0 | 1000| 17|
|16 | 11111|0000000000010101| 0 |*******| 0 | 21| 18|
|16+ | 11111|1110011111000010| 0 |*******| 0 | 21| 18|
|17 | 11111|1110011111000010| 0 |*******| 0 | 21| 21|
|17+ | 11111|0000000000000010| 0 |*******| 0 | 21| 21|
|18 | 11111|0000000000000010| 0 |*******| 0 | 2| 22|
|18+ | 11111|1110000010010000| 0 |*******| 0 | 2| 22|
|19 | 11111|1110000010010000| 0 |*******| 0 | 2| 23|
|19+ | 11111|0000001111101000| 0 |*******| 0 | 2| 23|
|20 | 11111|0000001111101000| 0 |*******| 0 | 1000| 24|
|20+ | 11111|1110111010010000| 0 |*******| 0 | 1000| 24|
|21 | 11111|1110111010010000| 0 |*******| 0 | 1000| 25|
|21+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 25|
|22 | 11111|1110001100000001| 0 |*******| 0 | 1000| 26|
|22+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 26|
|23 | 11111|1110001100000010| 0 |*******| 0 | 1000| 27|
|23+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 27|
|24 | 11111|1110001100000011| 0 |*******| 0 | 1000| 28|
|24+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 28|
|25 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000|
|25+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000|
|26 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000|
|26+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000|
|27 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000|
|27+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000|
|28 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000|
|28+ | 11111|1110101010010000| 0 |*******| 0 | 1000| 1000|
|29 | 11111|1110101010010000| 0 |*******| 0 | 1000| 1001|
|29+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 1001|
|30 | 11111|1110001100000001| 0 |*******| 0 | 1000| 1002|
|30+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 1002|
|31 | 11111|1110001100000010| 0 |*******| 0 | 1000| 1000|
|31+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000|
|32 | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000|
|32+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000|
|33 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1001|
|33+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1001|
|34 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1002|
|34+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1002|
|35 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000|
|35+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000|
|36 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000|
|36+ | 11111|1110111111010000| 0 |*******| 0 | 1000| 1000|
|37 | 11111|1110111111010000| 0 |*******| 0 | 1000| 1001|
|37+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 1001|
|38 | 11111|1110001100000001| 0 |*******| 0 | 1000| 1000|
|38+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 1000|
|39 | 11111|1110001100000010| 0 |*******| 0 | 1000| 1001|
|39+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 1001|
|40 | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000|
|40+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000|
|41 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1001|
|41+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1001|
|42 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000|
|42+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000|
|43 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1001|
|43+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1001|
|44 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000|
|44+ | 11111|1110001100000111| 1 |*******| 0 | 1000| 1000|
|45 | 11111|1110001100000111| 1 |*******| 0 | 1000| 0|
|45+ | 11111|0111111111111111| 0 |*******| 0 | 1000| 0|
|46 | 11111|0111111111111111| 0 |*******| 0 |32767| 1|

150
nand2tetris-suite/projects/05/CPU-external.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/05/CPU-external.tst
load CPU.hdl,
output-file CPU-external.out,
compare-to CPU-external.cmp,
output-list time%S0.4.0 inM%D0.6.0 instruction%B0.16.0 reset%B2.1.2 outM%D1.6.0 writeM%B3.1.3 addressM%D0.5.0 pc%D0.5.0;
set instruction %B0011000000111001, // @12345
tick, output, tock, output;
set instruction %B1110110000010000, // D=A
tick, output, tock, output;
set instruction %B0101101110100000, // @23456
tick, output, tock, output;
set instruction %B1110000111010000, // D=A-D
tick, output, tock, output;
set instruction %B0000001111101000, // @1000
tick, output, tock, output;
set instruction %B1110001100001000, // M=D
tick, output, tock, output;
set instruction %B0000001111101001, // @1001
tick, output, tock, output;
set instruction %B1110001110011000, // MD=D-1
tick, output, tock, output;
set instruction %B0000001111101000, // @1000
tick, output, tock, output;
set instruction %B1111010011010000, // D=D-M
set inM 11111,
tick, output, tock, output;
set instruction %B0000000000001110, // @14
tick, output, tock, output;
set instruction %B1110001100000100, // D;jlt
tick, output, tock, output;
set instruction %B0000001111100111, // @999
tick, output, tock, output;
set instruction %B1110110111100000, // A=A+1
tick, output, tock, output;
set instruction %B1110001100001000, // M=D
tick, output, tock, output;
set instruction %B0000000000010101, // @21
tick, output, tock, output;
set instruction %B1110011111000010, // D+1;jeq
tick, output, tock, output;
set instruction %B0000000000000010, // @2
tick, output, tock, output;
set instruction %B1110000010010000, // D=D+A
tick, output, tock, output;
set instruction %B0000001111101000, // @1000
tick, output, tock, output;
set instruction %B1110111010010000, // D=-1
tick, output, tock, output;
set instruction %B1110001100000001, // D;JGT
tick, output, tock, output;
set instruction %B1110001100000010, // D;JEQ
tick, output, tock, output;
set instruction %B1110001100000011, // D;JGE
tick, output, tock, output;
set instruction %B1110001100000100, // D;JLT
tick, output, tock, output;
set instruction %B1110001100000101, // D;JNE
tick, output, tock, output;
set instruction %B1110001100000110, // D;JLE
tick, output, tock, output;
set instruction %B1110001100000111, // D;JMP
tick, output, tock, output;
set instruction %B1110101010010000, // D=0
tick, output, tock, output;
set instruction %B1110001100000001, // D;JGT
tick, output, tock, output;
set instruction %B1110001100000010, // D;JEQ
tick, output, tock, output;
set instruction %B1110001100000011, // D;JGE
tick, output, tock, output;
set instruction %B1110001100000100, // D;JLT
tick, output, tock, output;
set instruction %B1110001100000101, // D;JNE
tick, output, tock, output;
set instruction %B1110001100000110, // D;JLE
tick, output, tock, output;
set instruction %B1110001100000111, // D;JMP
tick, output, tock, output;
set instruction %B1110111111010000, // D=1
tick, output, tock, output;
set instruction %B1110001100000001, // D;JGT
tick, output, tock, output;
set instruction %B1110001100000010, // D;JEQ
tick, output, tock, output;
set instruction %B1110001100000011, // D;JGE
tick, output, tock, output;
set instruction %B1110001100000100, // D;JLT
tick, output, tock, output;
set instruction %B1110001100000101, // D;JNE
tick, output, tock, output;
set instruction %B1110001100000110, // D;JLE
tick, output, tock, output;
set instruction %B1110001100000111, // D;JMP
tick, output, tock, output;
set reset 1;
tick, output, tock, output;
set instruction %B0111111111111111, // @32767
set reset 0;
tick, output, tock, output;

97
nand2tetris-suite/projects/05/CPU.cmp Normal file
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|time| inM | instruction |reset| outM |writeM |addre| pc |DRegiste|
|0+ | 0|0011000000111001| 0 |*******| 0 | 0| 0| 0 |
|1 | 0|0011000000111001| 0 |*******| 0 |12345| 1| 0 |
|1+ | 0|1110110000010000| 0 |*******| 0 |12345| 1| 12345 |
|2 | 0|1110110000010000| 0 |*******| 0 |12345| 2| 12345 |
|2+ | 0|0101101110100000| 0 |*******| 0 |12345| 2| 12345 |
|3 | 0|0101101110100000| 0 |*******| 0 |23456| 3| 12345 |
|3+ | 0|1110000111110000| 0 |*******| 0 |23456| 3| 11111 |
|4 | 0|1110000111110000| 0 |*******| 0 |11111| 4| 11111 |
|4+ | 0|0000001111101011| 0 |*******| 0 |11111| 4| 11111 |
|5 | 0|0000001111101011| 0 |*******| 0 | 1003| 5| 11111 |
|5+ | 0|1110001100001000| 0 | 11111| 1 | 1003| 5| 11111 |
|6 | 0|1110001100001000| 0 | 11111| 1 | 1003| 6| 11111 |
|6+ | 0|0000001111101100| 0 |*******| 0 | 1003| 6| 11111 |
|7 | 0|0000001111101100| 0 |*******| 0 | 1004| 7| 11111 |
|7+ | 0|1110001110011000| 0 | 11110| 1 | 1004| 7| 11110 |
|8 | 0|1110001110011000| 0 | 11109| 1 | 1004| 8| 11110 |
|8+ | 0|0000001111101000| 0 |*******| 0 | 1004| 8| 11110 |
|9 | 0|0000001111101000| 0 |*******| 0 | 1000| 9| 11110 |
|9+ | 11111|1111010011110000| 0 |*******| 0 | 1000| 9| -1 |
|10 | 11111|1111010011110000| 0 |*******| 0 |32767| 10| -1 |
|10+ | 11111|0000000000001110| 0 |*******| 0 |32767| 10| -1 |
|11 | 11111|0000000000001110| 0 |*******| 0 | 14| 11| -1 |
|11+ | 11111|1110001100000100| 0 |*******| 0 | 14| 11| -1 |
|12 | 11111|1110001100000100| 0 |*******| 0 | 14| 14| -1 |
|12+ | 11111|0000001111100111| 0 |*******| 0 | 14| 14| -1 |
|13 | 11111|0000001111100111| 0 |*******| 0 | 999| 15| -1 |
|13+ | 11111|1111110111100000| 0 |*******| 0 | 999| 15| -1 |
|14 | 11111|1111110111100000| 0 |*******| 0 |11112| 16| -1 |
|14+ | 11111|1110001100101000| 0 | -1| 1 |11112| 16| -1 |
|15 | 11111|1110001100101000| 0 | -1| 1 |32767| 17| -1 |
|15+ | 11111|0000000000010101| 0 |*******| 0 |32767| 17| -1 |
|16 | 11111|0000000000010101| 0 |*******| 0 | 21| 18| -1 |
|16+ | 11111|1110011111000010| 0 |*******| 0 | 21| 18| -1 |
|17 | 11111|1110011111000010| 0 |*******| 0 | 21| 21| -1 |
|17+ | 11111|0000000000000010| 0 |*******| 0 | 21| 21| -1 |
|18 | 11111|0000000000000010| 0 |*******| 0 | 2| 22| -1 |
|18+ | 11111|1110000010111000| 0 | 1| 1 | 2| 22| 1 |
|19 | 11111|1110000010111000| 0 | 2| 1 | 1| 23| 1 |
|19+ | 11111|1111110111001000| 0 | 11112| 1 | 1| 23| 1 |
|20 | 11111|1111110111001000| 0 | 11112| 1 | 1| 24| 1 |
|20+ | 11111|1111110010101000| 0 | 11110| 1 | 1| 24| 1 |
|21 | 11111|1111110010101000| 0 | 11110| 1 |11110| 25| 1 |
|21+ | 11111|0000001111101000| 0 |*******| 0 |11110| 25| 1 |
|22 | 11111|0000001111101000| 0 |*******| 0 | 1000| 26| 1 |
|22+ | 11111|1110111010010000| 0 |*******| 0 | 1000| 26| -1 |
|23 | 11111|1110111010010000| 0 |*******| 0 | 1000| 27| -1 |
|23+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 27| -1 |
|24 | 11111|1110001100000001| 0 |*******| 0 | 1000| 28| -1 |
|24+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 28| -1 |
|25 | 11111|1110001100000010| 0 |*******| 0 | 1000| 29| -1 |
|25+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 29| -1 |
|26 | 11111|1110001100000011| 0 |*******| 0 | 1000| 30| -1 |
|26+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 30| -1 |
|27 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000| -1 |
|27+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000| -1 |
|28 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000| -1 |
|28+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| -1 |
|29 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| -1 |
|29+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| -1 |
|30 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| -1 |
|30+ | 11111|1110101010010000| 0 |*******| 0 | 1000| 1000| 0 |
|31 | 11111|1110101010010000| 0 |*******| 0 | 1000| 1001| 0 |
|31+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 1001| 0 |
|32 | 11111|1110001100000001| 0 |*******| 0 | 1000| 1002| 0 |
|32+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 1002| 0 |
|33 | 11111|1110001100000010| 0 |*******| 0 | 1000| 1000| 0 |
|33+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000| 0 |
|34 | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000| 0 |
|34+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000| 0 |
|35 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1001| 0 |
|35+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1001| 0 |
|36 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1002| 0 |
|36+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1002| 0 |
|37 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| 0 |
|37+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| 0 |
|38 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| 0 |
|38+ | 11111|1110111111010000| 0 |*******| 0 | 1000| 1000| 1 |
|39 | 11111|1110111111010000| 0 |*******| 0 | 1000| 1001| 1 |
|39+ | 11111|1110001100000001| 0 |*******| 0 | 1000| 1001| 1 |
|40 | 11111|1110001100000001| 0 |*******| 0 | 1000| 1000| 1 |
|40+ | 11111|1110001100000010| 0 |*******| 0 | 1000| 1000| 1 |
|41 | 11111|1110001100000010| 0 |*******| 0 | 1000| 1001| 1 |
|41+ | 11111|1110001100000011| 0 |*******| 0 | 1000| 1001| 1 |
|42 | 11111|1110001100000011| 0 |*******| 0 | 1000| 1000| 1 |
|42+ | 11111|1110001100000100| 0 |*******| 0 | 1000| 1000| 1 |
|43 | 11111|1110001100000100| 0 |*******| 0 | 1000| 1001| 1 |
|43+ | 11111|1110001100000101| 0 |*******| 0 | 1000| 1001| 1 |
|44 | 11111|1110001100000101| 0 |*******| 0 | 1000| 1000| 1 |
|44+ | 11111|1110001100000110| 0 |*******| 0 | 1000| 1000| 1 |
|45 | 11111|1110001100000110| 0 |*******| 0 | 1000| 1001| 1 |
|45+ | 11111|1110001100000111| 0 |*******| 0 | 1000| 1001| 1 |
|46 | 11111|1110001100000111| 0 |*******| 0 | 1000| 1000| 1 |
|46+ | 11111|1110001100000111| 1 |*******| 0 | 1000| 1000| 1 |
|47 | 11111|1110001100000111| 1 |*******| 0 | 1000| 0| 1 |
|47+ | 11111|0111111111111111| 0 |*******| 0 | 1000| 0| 1 |
|48 | 11111|0111111111111111| 0 |*******| 0 |32767| 1| 1 |

43
nand2tetris-suite/projects/05/CPU.hdl Normal file
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@ -0,0 +1,43 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/05/CPU.hdl
/**
* The Hack CPU (Central Processing unit), consisting of an ALU,
* two registers named A and D, and a program counter named PC.
* The CPU is designed to fetch and execute instructions written in
* the Hack machine language. In particular, functions as follows:
* Executes the inputted instruction according to the Hack machine
* language specification. The D and A in the language specification
* refer to CPU-resident registers, while M refers to the external
* memory location addressed by A, i.e. to Memory[A]. The inM input
* holds the value of this location. If the current instruction needs
* to write a value to M, the value is placed in outM, the address
* of the target location is placed in the addressM output, and the
* writeM control bit is asserted. (When writeM==0, any value may
* appear in outM). The outM and writeM outputs are combinational:
* they are affected instantaneously by the execution of the current
* instruction. The addressM and pc outputs are clocked: although they
* are affected by the execution of the current instruction, they commit
* to their new values only in the next time step. If reset==1 then the
* CPU jumps to address 0 (i.e. pc is set to 0 in next time step) rather
* than to the address resulting from executing the current instruction.
*/
CHIP CPU {
IN inM[16], // M value input (M = contents of RAM[A])
instruction[16], // Instruction for execution
reset; // Signals whether to re-start the current
// program (reset==1) or continue executing
// the current program (reset==0).
OUT outM[16], // M value output
writeM, // Write to M?
addressM[15], // Address in data memory (of M)
pc[15]; // address of next instruction
PARTS:
// Put your code here:
}

156
nand2tetris-suite/projects/05/CPU.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/05/CPU.tst
load CPU.hdl,
output-file CPU.out,
compare-to CPU.cmp,
output-list time%S0.4.0 inM%D0.6.0 instruction%B0.16.0 reset%B2.1.2 outM%D1.6.0 writeM%B3.1.3 addressM%D0.5.0 pc%D0.5.0 DRegister[]%D1.6.1;
set instruction %B0011000000111001, // @12345
tick, output, tock, output;
set instruction %B1110110000010000, // D=A
tick, output, tock, output;
set instruction %B0101101110100000, // @23456
tick, output, tock, output;
set instruction %B1110000111110000, // AD=A-D
tick, output, tock, output;
set instruction %B0000001111101011, // @1003
tick, output, tock, output;
set instruction %B1110001100001000, // M=D
tick, output, tock, output;
set instruction %B0000001111101100, // @1004
tick, output, tock, output;
set instruction %B1110001110011000, // MD=D-1
tick, output, tock, output;
set instruction %B0000001111101000, // @1000
tick, output, tock, output;
set instruction %B1111010011110000, // AD=D-M
set inM 11111,
tick, output, tock, output;
set instruction %B0000000000001110, // @14
tick, output, tock, output;
set instruction %B1110001100000100, // D;jlt
tick, output, tock, output;
set instruction %B0000001111100111, // @999
tick, output, tock, output;
set instruction %B1111110111100000, // A=M+1
tick, output, tock, output;
set instruction %B1110001100101000, // AM=D
tick, output, tock, output;
set instruction %B0000000000010101, // @21
tick, output, tock, output;
set instruction %B1110011111000010, // D+1;jeq
tick, output, tock, output;
set instruction %B0000000000000010, // @2
tick, output, tock, output;
set instruction %B1110000010111000, // AMD=D+A
tick, output, tock, output;
set instruction %B1111110111001000, // M=M+1
tick, output, tock, output;
set instruction %B1111110010101000, // AM=M-1
tick, output, tock, output;
set instruction %B0000001111101000, // @1000
tick, output, tock, output;
set instruction %B1110111010010000, // D=-1
tick, output, tock, output;
set instruction %B1110001100000001, // D;JGT
tick, output, tock, output;
set instruction %B1110001100000010, // D;JEQ
tick, output, tock, output;
set instruction %B1110001100000011, // D;JGE
tick, output, tock, output;
set instruction %B1110001100000100, // D;JLT
tick, output, tock, output;
set instruction %B1110001100000101, // D;JNE
tick, output, tock, output;
set instruction %B1110001100000110, // D;JLE
tick, output, tock, output;
set instruction %B1110001100000111, // D;JMP
tick, output, tock, output;
set instruction %B1110101010010000, // D=0
tick, output, tock, output;
set instruction %B1110001100000001, // D;JGT
tick, output, tock, output;
set instruction %B1110001100000010, // D;JEQ
tick, output, tock, output;
set instruction %B1110001100000011, // D;JGE
tick, output, tock, output;
set instruction %B1110001100000100, // D;JLT
tick, output, tock, output;
set instruction %B1110001100000101, // D;JNE
tick, output, tock, output;
set instruction %B1110001100000110, // D;JLE
tick, output, tock, output;
set instruction %B1110001100000111, // D;JMP
tick, output, tock, output;
set instruction %B1110111111010000, // D=1
tick, output, tock, output;
set instruction %B1110001100000001, // D;JGT
tick, output, tock, output;
set instruction %B1110001100000010, // D;JEQ
tick, output, tock, output;
set instruction %B1110001100000011, // D;JGE
tick, output, tock, output;
set instruction %B1110001100000100, // D;JLT
tick, output, tock, output;
set instruction %B1110001100000101, // D;JNE
tick, output, tock, output;
set instruction %B1110001100000110, // D;JLE
tick, output, tock, output;
set instruction %B1110001100000111, // D;JMP
tick, output, tock, output;
set reset 1;
tick, output, tock, output;
set instruction %B0111111111111111, // @32767
set reset 0;
tick, output, tock, output;

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