mirror of
https://github.com/42wim/matterbridge.git
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1010 lines
10 KiB
Go
1010 lines
10 KiB
Go
// Inferno utils/6c/6.out.h
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// https://bitbucket.org/inferno-os/inferno-os/src/default/utils/6c/6.out.h
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//
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// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
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// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
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// Portions Copyright © 1997-1999 Vita Nuova Limited
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// Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
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// Portions Copyright © 2004,2006 Bruce Ellis
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// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
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// Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
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// Portions Copyright © 2009 The Go Authors. All rights reserved.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
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package x86
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import "github.com/google/gops/internal/obj"
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//go:generate go run ../stringer.go -i $GOFILE -o anames.go -p x86
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const (
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/* mark flags */
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DONE = 1 << iota
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PRESERVEFLAGS // not allowed to clobber flags
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)
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/*
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* amd64
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*/
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const (
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AAAA = obj.ABaseAMD64 + obj.A_ARCHSPECIFIC + iota
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AAAD
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AAAM
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AAAS
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AADCB
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AADCL
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AADCW
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AADDB
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AADDL
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AADDW
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AADJSP
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AANDB
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AANDL
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AANDW
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AARPL
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ABOUNDL
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ABOUNDW
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ABSFL
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ABSFW
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ABSRL
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ABSRW
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ABTL
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ABTW
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ABTCL
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ABTCW
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ABTRL
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ABTRW
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ABTSL
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ABTSW
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ABYTE
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ACLC
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ACLD
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ACLI
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ACLTS
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|
ACMC
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ACMPB
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ACMPL
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ACMPW
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ACMPSB
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ACMPSL
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ACMPSW
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|
ADAA
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ADAS
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|
ADECB
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|
ADECL
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|
ADECQ
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|
ADECW
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|
ADIVB
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|
ADIVL
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ADIVW
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|
AENTER
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AHADDPD
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|
AHADDPS
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|
AHLT
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|
AHSUBPD
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|
AHSUBPS
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|
AIDIVB
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|
AIDIVL
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AIDIVW
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AIMULB
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|
AIMULL
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AIMULW
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|
AINB
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|
AINL
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|
AINW
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|
AINCB
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|
AINCL
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|
AINCQ
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|
AINCW
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AINSB
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AINSL
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AINSW
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AINT
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AINTO
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AIRETL
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AIRETW
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AJCC // >= unsigned
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AJCS // < unsigned
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AJCXZL
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AJEQ // == (zero)
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AJGE // >= signed
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AJGT // > signed
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AJHI // > unsigned
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AJLE // <= signed
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AJLS // <= unsigned
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AJLT // < signed
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AJMI // sign bit set (negative)
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AJNE // != (nonzero)
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AJOC // overflow clear
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AJOS // overflow set
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AJPC // parity clear
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AJPL // sign bit clear (positive)
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AJPS // parity set
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ALAHF
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ALARL
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ALARW
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ALEAL
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ALEAW
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ALEAVEL
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ALEAVEW
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ALOCK
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ALODSB
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ALODSL
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ALODSW
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ALONG
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ALOOP
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ALOOPEQ
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ALOOPNE
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ALSLL
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ALSLW
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AMOVB
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AMOVL
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AMOVW
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AMOVBLSX
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AMOVBLZX
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AMOVBQSX
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AMOVBQZX
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AMOVBWSX
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AMOVBWZX
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AMOVWLSX
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AMOVWLZX
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AMOVWQSX
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AMOVWQZX
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AMOVSB
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AMOVSL
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AMOVSW
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|
AMULB
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AMULL
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AMULW
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ANEGB
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ANEGL
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ANEGW
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ANOTB
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ANOTL
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ANOTW
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AORB
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AORL
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AORW
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AOUTB
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AOUTL
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AOUTW
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AOUTSB
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AOUTSL
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AOUTSW
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APAUSE
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APOPAL
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APOPAW
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APOPCNTW
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APOPCNTL
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APOPCNTQ
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APOPFL
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APOPFW
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APOPL
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APOPW
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APUSHAL
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APUSHAW
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APUSHFL
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APUSHFW
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APUSHL
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APUSHW
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ARCLB
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ARCLL
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ARCLW
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ARCRB
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ARCRL
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ARCRW
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AREP
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AREPN
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AROLB
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AROLL
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AROLW
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ARORB
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ARORL
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ARORW
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ASAHF
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ASALB
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ASALL
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ASALW
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ASARB
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ASARL
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ASARW
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ASBBB
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ASBBL
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ASBBW
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ASCASB
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ASCASL
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ASCASW
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ASETCC
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ASETCS
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ASETEQ
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ASETGE
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ASETGT
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ASETHI
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ASETLE
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ASETLS
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ASETLT
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ASETMI
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ASETNE
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ASETOC
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ASETOS
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ASETPC
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ASETPL
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ASETPS
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ACDQ
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ACWD
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ASHLB
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ASHLL
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ASHLW
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ASHRB
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ASHRL
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ASHRW
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ASTC
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ASTD
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ASTI
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ASTOSB
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ASTOSL
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ASTOSW
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ASUBB
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ASUBL
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ASUBW
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ASYSCALL
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ATESTB
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ATESTL
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ATESTW
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AVERR
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AVERW
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AWAIT
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AWORD
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AXCHGB
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AXCHGL
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|
AXCHGW
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|
AXLAT
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|
AXORB
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|
AXORL
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|
AXORW
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|
AFMOVB
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AFMOVBP
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|
AFMOVD
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AFMOVDP
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|
AFMOVF
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|
AFMOVFP
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|
AFMOVL
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|
AFMOVLP
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|
AFMOVV
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|
AFMOVVP
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|
AFMOVW
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|
AFMOVWP
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|
AFMOVX
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|
AFMOVXP
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|
AFCOMD
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AFCOMDP
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|
AFCOMDPP
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|
AFCOMF
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AFCOMFP
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AFCOML
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|
AFCOMLP
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|
AFCOMW
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AFCOMWP
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|
AFUCOM
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|
AFUCOMP
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AFUCOMPP
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AFADDDP
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|
AFADDW
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|
AFADDL
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|
AFADDF
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|
AFADDD
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|
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|
AFMULDP
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|
AFMULW
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|
AFMULL
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|
AFMULF
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|
AFMULD
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|
|
|
AFSUBDP
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|
AFSUBW
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|
AFSUBL
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|
AFSUBF
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|
AFSUBD
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|
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|
AFSUBRDP
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|
AFSUBRW
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|
AFSUBRL
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|
AFSUBRF
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AFSUBRD
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|
AFDIVDP
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|
AFDIVW
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|
AFDIVL
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|
AFDIVF
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|
AFDIVD
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|
AFDIVRDP
|
|
AFDIVRW
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|
AFDIVRL
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|
AFDIVRF
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|
AFDIVRD
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|
AFXCHD
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|
AFFREE
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|
AFLDCW
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AFLDENV
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AFRSTOR
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|
AFSAVE
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|
AFSTCW
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|
AFSTENV
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|
AFSTSW
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|
AF2XM1
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|
AFABS
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|
AFCHS
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|
AFCLEX
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|
AFCOS
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|
AFDECSTP
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|
AFINCSTP
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|
AFINIT
|
|
AFLD1
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|
AFLDL2E
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|
AFLDL2T
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|
AFLDLG2
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|
AFLDLN2
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|
AFLDPI
|
|
AFLDZ
|
|
AFNOP
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|
AFPATAN
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|
AFPREM
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|
AFPREM1
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|
AFPTAN
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|
AFRNDINT
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|
AFSCALE
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|
AFSIN
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|
AFSINCOS
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|
AFSQRT
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|
AFTST
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AFXAM
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AFXTRACT
|
|
AFYL2X
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|
AFYL2XP1
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// extra 32-bit operations
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ACMPXCHGB
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|
ACMPXCHGL
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|
ACMPXCHGW
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ACMPXCHG8B
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|
ACPUID
|
|
AINVD
|
|
AINVLPG
|
|
ALFENCE
|
|
AMFENCE
|
|
AMOVNTIL
|
|
ARDMSR
|
|
ARDPMC
|
|
ARDTSC
|
|
ARSM
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|
ASFENCE
|
|
ASYSRET
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|
AWBINVD
|
|
AWRMSR
|
|
AXADDB
|
|
AXADDL
|
|
AXADDW
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|
|
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// conditional move
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ACMOVLCC
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|
ACMOVLCS
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|
ACMOVLEQ
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|
ACMOVLGE
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|
ACMOVLGT
|
|
ACMOVLHI
|
|
ACMOVLLE
|
|
ACMOVLLS
|
|
ACMOVLLT
|
|
ACMOVLMI
|
|
ACMOVLNE
|
|
ACMOVLOC
|
|
ACMOVLOS
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|
ACMOVLPC
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|
ACMOVLPL
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|
ACMOVLPS
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|
ACMOVQCC
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|
ACMOVQCS
|
|
ACMOVQEQ
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|
ACMOVQGE
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|
ACMOVQGT
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|
ACMOVQHI
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|
ACMOVQLE
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|
ACMOVQLS
|
|
ACMOVQLT
|
|
ACMOVQMI
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|
ACMOVQNE
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|
ACMOVQOC
|
|
ACMOVQOS
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|
ACMOVQPC
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|
ACMOVQPL
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|
ACMOVQPS
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|
ACMOVWCC
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|
ACMOVWCS
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|
ACMOVWEQ
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|
ACMOVWGE
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|
ACMOVWGT
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|
ACMOVWHI
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|
ACMOVWLE
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|
ACMOVWLS
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|
ACMOVWLT
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|
ACMOVWMI
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|
ACMOVWNE
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|
ACMOVWOC
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|
ACMOVWOS
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ACMOVWPC
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|
ACMOVWPL
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ACMOVWPS
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// 64-bit
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AADCQ
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|
AADDQ
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|
AANDQ
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ABSFQ
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|
ABSRQ
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|
ABTCQ
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|
ABTQ
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|
ABTRQ
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|
ABTSQ
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|
ACMPQ
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|
ACMPSQ
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|
ACMPXCHGQ
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|
ACQO
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|
ADIVQ
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|
AIDIVQ
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|
AIMULQ
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|
AIRETQ
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|
AJCXZQ
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|
ALEAQ
|
|
ALEAVEQ
|
|
ALODSQ
|
|
AMOVQ
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|
AMOVLQSX
|
|
AMOVLQZX
|
|
AMOVNTIQ
|
|
AMOVSQ
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|
AMULQ
|
|
ANEGQ
|
|
ANOTQ
|
|
AORQ
|
|
APOPFQ
|
|
APOPQ
|
|
APUSHFQ
|
|
APUSHQ
|
|
ARCLQ
|
|
ARCRQ
|
|
AROLQ
|
|
ARORQ
|
|
AQUAD
|
|
ASALQ
|
|
ASARQ
|
|
ASBBQ
|
|
ASCASQ
|
|
ASHLQ
|
|
ASHRQ
|
|
ASTOSQ
|
|
ASUBQ
|
|
ATESTQ
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|
AXADDQ
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|
AXCHGQ
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|
AXORQ
|
|
AXGETBV
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|
|
|
// media
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|
AADDPD
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|
AADDPS
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|
AADDSD
|
|
AADDSS
|
|
AANDNL
|
|
AANDNQ
|
|
AANDNPD
|
|
AANDNPS
|
|
AANDPD
|
|
AANDPS
|
|
ABEXTRL
|
|
ABEXTRQ
|
|
ABLSIL
|
|
ABLSIQ
|
|
ABLSMSKL
|
|
ABLSMSKQ
|
|
ABLSRL
|
|
ABLSRQ
|
|
ABZHIL
|
|
ABZHIQ
|
|
ACMPPD
|
|
ACMPPS
|
|
ACMPSD
|
|
ACMPSS
|
|
ACOMISD
|
|
ACOMISS
|
|
ACVTPD2PL
|
|
ACVTPD2PS
|
|
ACVTPL2PD
|
|
ACVTPL2PS
|
|
ACVTPS2PD
|
|
ACVTPS2PL
|
|
ACVTSD2SL
|
|
ACVTSD2SQ
|
|
ACVTSD2SS
|
|
ACVTSL2SD
|
|
ACVTSL2SS
|
|
ACVTSQ2SD
|
|
ACVTSQ2SS
|
|
ACVTSS2SD
|
|
ACVTSS2SL
|
|
ACVTSS2SQ
|
|
ACVTTPD2PL
|
|
ACVTTPS2PL
|
|
ACVTTSD2SL
|
|
ACVTTSD2SQ
|
|
ACVTTSS2SL
|
|
ACVTTSS2SQ
|
|
ADIVPD
|
|
ADIVPS
|
|
ADIVSD
|
|
ADIVSS
|
|
AEMMS
|
|
AFXRSTOR
|
|
AFXRSTOR64
|
|
AFXSAVE
|
|
AFXSAVE64
|
|
ALDDQU
|
|
ALDMXCSR
|
|
AMASKMOVOU
|
|
AMASKMOVQ
|
|
AMAXPD
|
|
AMAXPS
|
|
AMAXSD
|
|
AMAXSS
|
|
AMINPD
|
|
AMINPS
|
|
AMINSD
|
|
AMINSS
|
|
AMOVAPD
|
|
AMOVAPS
|
|
AMOVOU
|
|
AMOVHLPS
|
|
AMOVHPD
|
|
AMOVHPS
|
|
AMOVLHPS
|
|
AMOVLPD
|
|
AMOVLPS
|
|
AMOVMSKPD
|
|
AMOVMSKPS
|
|
AMOVNTO
|
|
AMOVNTPD
|
|
AMOVNTPS
|
|
AMOVNTQ
|
|
AMOVO
|
|
AMOVQOZX
|
|
AMOVSD
|
|
AMOVSS
|
|
AMOVUPD
|
|
AMOVUPS
|
|
AMULPD
|
|
AMULPS
|
|
AMULSD
|
|
AMULSS
|
|
AMULXL
|
|
AMULXQ
|
|
AORPD
|
|
AORPS
|
|
APACKSSLW
|
|
APACKSSWB
|
|
APACKUSWB
|
|
APADDB
|
|
APADDL
|
|
APADDQ
|
|
APADDSB
|
|
APADDSW
|
|
APADDUSB
|
|
APADDUSW
|
|
APADDW
|
|
APAND
|
|
APANDN
|
|
APAVGB
|
|
APAVGW
|
|
APCMPEQB
|
|
APCMPEQL
|
|
APCMPEQW
|
|
APCMPGTB
|
|
APCMPGTL
|
|
APCMPGTW
|
|
APDEPL
|
|
APDEPQ
|
|
APEXTL
|
|
APEXTQ
|
|
APEXTRB
|
|
APEXTRD
|
|
APEXTRQ
|
|
APEXTRW
|
|
APHADDD
|
|
APHADDSW
|
|
APHADDW
|
|
APHMINPOSUW
|
|
APHSUBD
|
|
APHSUBSW
|
|
APHSUBW
|
|
APINSRB
|
|
APINSRD
|
|
APINSRQ
|
|
APINSRW
|
|
APMADDWL
|
|
APMAXSW
|
|
APMAXUB
|
|
APMINSW
|
|
APMINUB
|
|
APMOVMSKB
|
|
APMOVSXBD
|
|
APMOVSXBQ
|
|
APMOVSXBW
|
|
APMOVSXDQ
|
|
APMOVSXWD
|
|
APMOVSXWQ
|
|
APMOVZXBD
|
|
APMOVZXBQ
|
|
APMOVZXBW
|
|
APMOVZXDQ
|
|
APMOVZXWD
|
|
APMOVZXWQ
|
|
APMULDQ
|
|
APMULHUW
|
|
APMULHW
|
|
APMULLD
|
|
APMULLW
|
|
APMULULQ
|
|
APOR
|
|
APSADBW
|
|
APSHUFB
|
|
APSHUFHW
|
|
APSHUFL
|
|
APSHUFLW
|
|
APSHUFW
|
|
APSLLL
|
|
APSLLO
|
|
APSLLQ
|
|
APSLLW
|
|
APSRAL
|
|
APSRAW
|
|
APSRLL
|
|
APSRLO
|
|
APSRLQ
|
|
APSRLW
|
|
APSUBB
|
|
APSUBL
|
|
APSUBQ
|
|
APSUBSB
|
|
APSUBSW
|
|
APSUBUSB
|
|
APSUBUSW
|
|
APSUBW
|
|
APUNPCKHBW
|
|
APUNPCKHLQ
|
|
APUNPCKHQDQ
|
|
APUNPCKHWL
|
|
APUNPCKLBW
|
|
APUNPCKLLQ
|
|
APUNPCKLQDQ
|
|
APUNPCKLWL
|
|
APXOR
|
|
ARCPPS
|
|
ARCPSS
|
|
ARSQRTPS
|
|
ARSQRTSS
|
|
ASARXL
|
|
ASARXQ
|
|
ASHLXL
|
|
ASHLXQ
|
|
ASHRXL
|
|
ASHRXQ
|
|
ASHUFPD
|
|
ASHUFPS
|
|
ASQRTPD
|
|
ASQRTPS
|
|
ASQRTSD
|
|
ASQRTSS
|
|
ASTMXCSR
|
|
ASUBPD
|
|
ASUBPS
|
|
ASUBSD
|
|
ASUBSS
|
|
AUCOMISD
|
|
AUCOMISS
|
|
AUNPCKHPD
|
|
AUNPCKHPS
|
|
AUNPCKLPD
|
|
AUNPCKLPS
|
|
AXORPD
|
|
AXORPS
|
|
APCMPESTRI
|
|
|
|
ARETFW
|
|
ARETFL
|
|
ARETFQ
|
|
ASWAPGS
|
|
|
|
AMODE
|
|
ACRC32B
|
|
ACRC32Q
|
|
AIMUL3Q
|
|
|
|
APREFETCHT0
|
|
APREFETCHT1
|
|
APREFETCHT2
|
|
APREFETCHNTA
|
|
|
|
AMOVQL
|
|
ABSWAPL
|
|
ABSWAPQ
|
|
|
|
AAESENC
|
|
AAESENCLAST
|
|
AAESDEC
|
|
AAESDECLAST
|
|
AAESIMC
|
|
AAESKEYGENASSIST
|
|
|
|
AROUNDPS
|
|
AROUNDSS
|
|
AROUNDPD
|
|
AROUNDSD
|
|
AMOVDDUP
|
|
AMOVSHDUP
|
|
AMOVSLDUP
|
|
|
|
APSHUFD
|
|
APCLMULQDQ
|
|
|
|
AVZEROUPPER
|
|
AVMOVDQU
|
|
AVMOVNTDQ
|
|
AVMOVDQA
|
|
AVPCMPEQB
|
|
AVPXOR
|
|
AVPMOVMSKB
|
|
AVPAND
|
|
AVPTEST
|
|
AVPBROADCASTB
|
|
AVPSHUFB
|
|
AVPSHUFD
|
|
AVPERM2F128
|
|
AVPALIGNR
|
|
AVPADDQ
|
|
AVPADDD
|
|
AVPSRLDQ
|
|
AVPSLLDQ
|
|
AVPSRLQ
|
|
AVPSLLQ
|
|
AVPSRLD
|
|
AVPSLLD
|
|
AVPOR
|
|
AVPBLENDD
|
|
AVINSERTI128
|
|
AVPERM2I128
|
|
ARORXL
|
|
ARORXQ
|
|
AVBROADCASTSS
|
|
AVBROADCASTSD
|
|
AVMOVDDUP
|
|
AVMOVSHDUP
|
|
AVMOVSLDUP
|
|
|
|
// from 386
|
|
AJCXZW
|
|
AFCMOVCC
|
|
AFCMOVCS
|
|
AFCMOVEQ
|
|
AFCMOVHI
|
|
AFCMOVLS
|
|
AFCMOVNE
|
|
AFCMOVNU
|
|
AFCMOVUN
|
|
AFCOMI
|
|
AFCOMIP
|
|
AFUCOMI
|
|
AFUCOMIP
|
|
|
|
// TSX
|
|
AXACQUIRE
|
|
AXRELEASE
|
|
AXBEGIN
|
|
AXEND
|
|
AXABORT
|
|
AXTEST
|
|
|
|
ALAST
|
|
)
|
|
|
|
const (
|
|
REG_NONE = 0
|
|
)
|
|
|
|
const (
|
|
REG_AL = obj.RBaseAMD64 + iota
|
|
REG_CL
|
|
REG_DL
|
|
REG_BL
|
|
REG_SPB
|
|
REG_BPB
|
|
REG_SIB
|
|
REG_DIB
|
|
REG_R8B
|
|
REG_R9B
|
|
REG_R10B
|
|
REG_R11B
|
|
REG_R12B
|
|
REG_R13B
|
|
REG_R14B
|
|
REG_R15B
|
|
|
|
REG_AX
|
|
REG_CX
|
|
REG_DX
|
|
REG_BX
|
|
REG_SP
|
|
REG_BP
|
|
REG_SI
|
|
REG_DI
|
|
REG_R8
|
|
REG_R9
|
|
REG_R10
|
|
REG_R11
|
|
REG_R12
|
|
REG_R13
|
|
REG_R14
|
|
REG_R15
|
|
|
|
REG_AH
|
|
REG_CH
|
|
REG_DH
|
|
REG_BH
|
|
|
|
REG_F0
|
|
REG_F1
|
|
REG_F2
|
|
REG_F3
|
|
REG_F4
|
|
REG_F5
|
|
REG_F6
|
|
REG_F7
|
|
|
|
REG_M0
|
|
REG_M1
|
|
REG_M2
|
|
REG_M3
|
|
REG_M4
|
|
REG_M5
|
|
REG_M6
|
|
REG_M7
|
|
|
|
REG_X0
|
|
REG_X1
|
|
REG_X2
|
|
REG_X3
|
|
REG_X4
|
|
REG_X5
|
|
REG_X6
|
|
REG_X7
|
|
REG_X8
|
|
REG_X9
|
|
REG_X10
|
|
REG_X11
|
|
REG_X12
|
|
REG_X13
|
|
REG_X14
|
|
REG_X15
|
|
|
|
REG_Y0
|
|
REG_Y1
|
|
REG_Y2
|
|
REG_Y3
|
|
REG_Y4
|
|
REG_Y5
|
|
REG_Y6
|
|
REG_Y7
|
|
REG_Y8
|
|
REG_Y9
|
|
REG_Y10
|
|
REG_Y11
|
|
REG_Y12
|
|
REG_Y13
|
|
REG_Y14
|
|
REG_Y15
|
|
|
|
REG_CS
|
|
REG_SS
|
|
REG_DS
|
|
REG_ES
|
|
REG_FS
|
|
REG_GS
|
|
|
|
REG_GDTR /* global descriptor table register */
|
|
REG_IDTR /* interrupt descriptor table register */
|
|
REG_LDTR /* local descriptor table register */
|
|
REG_MSW /* machine status word */
|
|
REG_TASK /* task register */
|
|
|
|
REG_CR0
|
|
REG_CR1
|
|
REG_CR2
|
|
REG_CR3
|
|
REG_CR4
|
|
REG_CR5
|
|
REG_CR6
|
|
REG_CR7
|
|
REG_CR8
|
|
REG_CR9
|
|
REG_CR10
|
|
REG_CR11
|
|
REG_CR12
|
|
REG_CR13
|
|
REG_CR14
|
|
REG_CR15
|
|
|
|
REG_DR0
|
|
REG_DR1
|
|
REG_DR2
|
|
REG_DR3
|
|
REG_DR4
|
|
REG_DR5
|
|
REG_DR6
|
|
REG_DR7
|
|
|
|
REG_TR0
|
|
REG_TR1
|
|
REG_TR2
|
|
REG_TR3
|
|
REG_TR4
|
|
REG_TR5
|
|
REG_TR6
|
|
REG_TR7
|
|
|
|
REG_TLS
|
|
|
|
MAXREG
|
|
|
|
REG_CR = REG_CR0
|
|
REG_DR = REG_DR0
|
|
REG_TR = REG_TR0
|
|
|
|
REGARG = -1
|
|
REGRET = REG_AX
|
|
FREGRET = REG_X0
|
|
REGSP = REG_SP
|
|
REGCTXT = REG_DX
|
|
REGEXT = REG_R15 /* compiler allocates external registers R15 down */
|
|
FREGMIN = REG_X0 + 5 /* first register variable */
|
|
FREGEXT = REG_X0 + 15 /* first external register */
|
|
T_TYPE = 1 << 0
|
|
T_INDEX = 1 << 1
|
|
T_OFFSET = 1 << 2
|
|
T_FCONST = 1 << 3
|
|
T_SYM = 1 << 4
|
|
T_SCONST = 1 << 5
|
|
T_64 = 1 << 6
|
|
T_GOTYPE = 1 << 7
|
|
)
|